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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5409866 B1

PDFFull Text
Date of Patent:
Apr. 25, 1995

Filed:

Dec. 24, 1992

Process for manufacturing a semiconductor device affixed to an upper and

Applicant:
Inventors:

Mitsutaka Sato, Kawasaki, JP;

Junichi Kasai, Kawasaki, JP;

Masanori Yoshimoto, Kawasaki, JP;

Kouichi Takeshita, Satsuma, JP;

Assignees:

Fujitsu Ltd., Kawasaki, JP;

Kyushu Fujitsu Electronics Ltd., Kagoshima, JP;

Attorney:

Staas & Halsey

Primary Examiner:

Olik Chaudhuri

Assistant Examiner:

David E Graybill

Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
437211 ; 437217 ; 437220 ; 257672 ; 26427217 ;
Abstract

A process for manufacturing semiconductor device including a semiconductor chip having top and bottom surfaces, upper leads electrically coupled to the semiconductor chip, where a first gap is formed between the upper leads and the top surface of the semiconductor chip, lower leads electrically coupled to the semiconductor chip, where a second gap is formed between the lower leads and the bottom surface of the semiconductor chip, and an encapsulating resin which encapsulates the semiconductor chip so as to maintain the first and second gaps.

Find Patent Forward Citations

Sato, Mitsutaka. (1995). Process for manufacturing a semiconductor device affixed to an upper and (U.S. Patent No. 5409866). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5409866

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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