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Livermore, CA, United States of America

Mark William Bales

USPTO Granted Patents = 4 (Patent Applications = 1)

Average Co-Inventor Count = 1.8

ph-index = 1

Forward Citations = 1(Granted Patents)

Location History:

Mountain View, CA (US) (2017)
Livermore, CA (US) (2019 - 2020)

Company Filing History:

Years Active: 2017-2020

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10831964 - IC physical design using a tiling engine (2020-11-10),

2. 10339259 - Method for organizing, controlling, and reporting on design mismatch information in IC physical design data (2019-07-02),

3. 10318685 - Management of placement constraint regions in an electronic design automation (EDA) system (2019-06-11),

4. 9697313 - Organization for virtual-flat expansion of physical data in physically-hierarchical IC designs (2017-07-04),

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