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For the Inventor, By the Inventor

San Jose, CA, United States of America

Krishnan Srinivasan

This inventor holds 33 USPTO granted patents and 6 published patent applications and 1 EPO patent, primarily in Network-On-Chip Design. Top assignees: Xilinx, Inc., Sonics, Incorporated, Intel Corporation. Active years: 2011-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Krishnan Srinivasan. Retrieved from https://idiyas.com/inventor/krishnan-srinivasan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 33 

% Patents Active = 69.7

 

Average Co-Inventor Count = 3.2

ph-index = 7

Forward Citations = 140(Granted Patents)


Location History:

  • Cupertino, CA (US) (2011 - 2013)
  • San Jose, CA (US) (2013 - 2024)

Company Filing History:

goldMedal21 out of 5,121 
 
Xilinx, Inc.
 patents
silverMedal8 out of 72 
 
Sonics, Incorporated
 patents
bronzeMedal2 out of 56,440 
 
Intel Corporation
 patents
4. 1 out of 1,813 
 
Avago Technologies General IP (Singapore) Pte. Ltd.
 patents
5. 1 out of 1,422 
 
Nuance Communications, Inc.
 patents

Years Active: 2011-2026

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Areas of Expertise:
Network-On-Chip
Data Compression
Error Correction
Chip-to-Chip Interface
Memory Management
Integrated Circuit
Buffer Management
Dynamic Allocation
Performance Analysis
Routing Techniques
Security Mechanisms
Electronic Design Automation
33 patents (USPTO):Explore Patents
1. 12699832 - Multi-path routing in a network on chip (2026-08-04),
2. 12640754 - System-level data compression scheme (2026-05-26),
3. 12603988 - End-to-end safety mechanism for display system (2026-04-14),
4. 12530311 - Multi-use chip-to-chip interface (2026-01-20),
5. 12489549 - System-level techniques for error correction in chip-to-chip interfaces (2025-12-02),
6. 12474866 - Interconnect circuitry for multi-channel and multi-requester memory systems (2025-11-18),
7. 12430275 - Methods to extend NoC interconnect across multiple dice in 3D (2025-09-30),
8. 12373360 - Integrated circuit transaction redundancy (2025-07-29),
9. 12353717 - Localized and relocatable software placement and NoC-based access to memory controllers (2025-07-08),
10. 12244518 - Network-on-chip architecture for handling different data sizes (2025-03-04),
11. 12235782 - NoC routing in a multi-chip device (2025-02-25),
12. 12111784 - NoC buffer management for virtual channels (2024-10-08),
13. 12066969 - IC with adaptive chip-to-chip interface to support different chip-to-chip (2024-08-20),
14. 12019908 - Dynamically allocated buffer pooling (2024-06-25),
15. 12019576 - Systems and methods to transport memory mapped traffic amongst integrated circuit devices (2024-06-25),

Title: The Innovative Journey of Krishnan Srinivasan

Introduction: Krishnan Srinivasan, a talented inventor based in San Jose, CA, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Krishnan Srinivasan's latest patents include a cutting-edge artificial intelligence algorithm for predictive analytics and a revolutionary wearable device for monitoring vital signs in real-time.

Career Highlights: With a career spanning over two decades, Krishnan Srinivasan has worked for top tech companies in Silicon Valley, leading research and development teams to create cutting-edge solutions in areas such as machine learning, Internet of Things (IoT), and cybersecurity.

Collaborations: Throughout his career, Krishnan Srinivasan has collaborated with renowned researchers and engineers from leading universities and research institutions, fostering a culture of innovation and knowledge sharing.

Conclusion: Krishnan Srinivasan's passion for pushing the boundaries of technology and his relentless pursuit of innovation continue to inspire the next generation of inventors and entrepreneurs in the ever-evolving tech landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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