The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Jan. 31, 2022
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Krishnan Srinivasan, San Jose, CA (US);

Sagheer Ahmad, Cupertino, CA (US);

Ygal Arbel, Morgan Hill, CA (US);

Millind Mittal, Saratoga, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/38 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/42 (2013.01); G06F 13/382 (2013.01); G06F 13/4063 (2013.01);
Abstract

Embodiments herein describe using an adaptive chip-to-chip (C2C) interface to interconnect two chips, wherein the adaptive C2C interface includes circuitry for performing multiple different C2C protocols to communicate with the other chip. One or both of the chips in the C2C connection can include the adaptive C2C interface. During boot time, the adaptive C2C interface is configured to perform one of the different C2C protocols. During runtime, the chip then uses the selected C2C protocol to communicate with the other chip in the C2C connection.


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