Osaka, Japan

Kojiro Nakamura

This inventor holds 4 USPTO granted patents and 2 published patent applications. Top assignees: Panasonic Corporation, Panasonic Intellectual Property Management Co., Ltd.. Active years: 2011-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kojiro Nakamura. Retrieved from https://idiyas.com/inventor/kojiro-nakamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 4 

% Patents Active = 50.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2011-2026

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4 patents (USPTO):Explore Patents

Title: Kojiro Nakamura: Semiconductor and Wafer-Processing Inventions.

Introduction

Kojiro Nakamura is an inventor associated with Osaka, Japan. His patent work includes inventions related to wafer separation and semiconductor mounting structures. He is credited with 4 patents.

Latest Patents

Nakamura’s listed latest patents include “Wafer Separating Apparatus and Wafer Separating Method.” The invention describes an apparatus for separating wafers bonded to a slicing base with adhesive. It uses a water tank, a retainer for holding the slicing base, a water-jet nozzle directed at a wafer’s side, and a tray inside the tank to collect separated wafers.

His other listed patent, “Mounting Structure and Mounting Method,” concerns a semiconductor element mounted to a circuit board. The structure uses conductive, two-layer bumps, with the bumps joined to the board electrodes larger than those joined to the semiconductor element. The axes of the two bump layers are offset rather than aligned.

Career Highlights

Nakamura’s listed company affiliations include Panasonic Corporation and Panasonic Intellectual Property Management Co., Ltd. His patent portfolio reflects work in semiconductor assembly and wafer-processing technologies.

Collaborations

Nakamura’s listed coworkers include Kentaro Kumazawa and Michirou Yoshino. Their names provide context for his professional connections in the patent and technology field.

Conclusion

Kojiro Nakamura’s listed inventions address practical challenges in wafer separation and semiconductor mounting, reflecting a focus on manufacturing and electronic-device technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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