Nirasaki, Japan

Kiyoshi Takekoshi

This inventor holds 26 USPTO granted patents, primarily in Probe Card Technology. Top assignees: Tokyo Electron Limited, Ibiden Company Limited, Kabushiki Kaisha Toshiba. Active years: 1990-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kiyoshi Takekoshi. Retrieved from https://idiyas.com/inventor/kiyoshi-takekoshi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 42.3

Average Co-Inventor Count = 1.6

ph-index = 8

Forward Citations = 333(Granted Patents)


Location History:

  • Yamanashi-ken, JP (1997 - 2000)
  • Nishiyatsushiro-gun, JP (2002 - 2003)
  • Nirasaki-shi, JP (2007)
  • Yamanashi, JP (1990 - 2012)
  • Nirasaki, JP (2003 - 2013)

Company Filing History:


Years Active: 1990-2013

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Areas of Expertise:
Probe Card
Reliability Evaluation
Inspection Apparatus
Dicing Method
Integrated Circuit
Trapezoidal Contactor
Vacuum Prober
LCD Testing
Contact Mechanism
Pressure Sensitive Adhesive
Probing Card
Transfer Apparatus
26 patents (USPTO):Explore Patents

Title: Kiyoshi Takekoshi: Innovator in Semiconductor Reliability Testing

Introduction

Kiyoshi Takekoshi, an accomplished inventor from Nirasaki, Japan, holds an impressive portfolio of 26 patents. His work primarily focuses on reliability evaluation in semiconductor technology, showcasing his dedication to advancing the field of electronics.

Latest Patents

Among his latest innovations are several sophisticated devices designed for reliability evaluation. These include a reliability evaluation test apparatus and method that facilitate the examination of interconnection and insulating films on semiconductor wafers. The reliability evaluation test apparatus features a wafer storage section that ensures electrical contact between the wafer's electrode pads and the contactor's bumps. It is constructed with a hermetic and heat-insulating structure and is equipped with mechanisms that apply pressure and heat to the wafer during testing. This design allows for evaluating reliability under accelerated conditions.

Another notable patent is the probe card for inspecting light-receiving devices, particularly CCD sensors. This invention employs a circuit board with multiple openings and vertically-aligned probe pins that provide efficient simultaneous inspection of several sensors. The transparent guide board enhances the inspection process by allowing inspection light to pass through and illuminate the sensors without obstructing the view.

Career Highlights

Kiyoshi has worked with notable companies, including Tokyo Electron Limited, where he contributed his expertise in semiconductor technology and development. His extensive experience in the industry has made him a recognized figure in reliability testing.

Collaborations

Throughout his career, Kiyoshi has collaborated with distinguished individuals such as Shinji Iino and Hisatomi Hosaka. These partnerships have fostered innovation and helped advance Kiyoshi's pioneering work in the field of semiconductor reliability evaluation.

Conclusion

Kiyoshi Takekoshi's contributions to the realm of semiconductor technology through his numerous patents and innovative designs have significantly impacted the industry. His commitment to enhancing reliability testing not only reinforces the performance of electronic devices but also sets a benchmark for future inventions in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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