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For the Inventor, By the Inventor

Tokorozawa, Japan

Keiichi Kurakazu

This inventor holds 34 USPTO granted patents and 2 published patent applications, primarily in Microcomputer Technology. Top assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd., Hitachi Vlsi Engineering Corp.. Active years: 1989-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Keiichi Kurakazu. Retrieved from https://idiyas.com/inventor/keiichi-kurakazu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 34 

% Patents Active = 91.2

Average Co-Inventor Count = 6.1

ph-index = 14

Forward Citations = 448(Granted Patents)


Location History:

  • Princeton, NJ (US) (1994)
  • Kodaira, JP (1997)
  • Tokyo, JP (1994 - 1999)
  • Tachikawa, JP (1989 - 2001)
  • Tokorozawa, JP (1999 - 2006)

Company Filing History:

goldMedal27 out of 42,731 
 
Hitachi, Ltd.
 patents
silverMedal4 out of 64 
 
Hitachi Microcomputer System, Ltd.
 patents
bronzeMedal4 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
4. 2 out of 149 
 
Hitachi Microcomputer Engineering, Ltd.
 patents
5. 1 out of 87 
 
Hitachi Ulsi Engineering Corp.
 patents
6. 1 out of 3,781 
 
Renesas Technology Corp.
 patents
7. 6 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 1989-2006

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Areas of Expertise:
Microcomputer
Data Processor
Single-Chip
RISC System
Bus Structure
Instruction Queue
Memory Control
Processing System
Hierarchical Bus
Dynamic Memory
Control Terminals
34 patents (USPTO):Explore Patents
1. 6996700 - Microcomputer and dividing circuit (2006-02-07),
2. 6748507 - Single-chip microcomputer with integral clock generating unit providing clock signals to CPU, internal circuit modules and synchronously controlling external dynamic memory (2004-06-08),
3. 6735683 - Single-chip microcomputer with hierarchical internal bus structure having data and address signal lines coupling CPU with other processing elements (2004-05-11),
4. 6591294 - Processing system with microcomputers each operable in master and slave modes using configurable bus access control terminals and bus use priority signals (2003-07-08),
5. 6351788 - Data processor and data processing system (2002-02-26),
6. 6343357 - Microcomputer and dividing circuit (2002-01-29),
7. 6279063 - Microcomputer system with at least first and second microcomputers each operable in master and slave modes with configurable bus access control terminals and bus use priority controller (2001-08-21),
8. 6272620 - Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation (2001-08-07),
9. 6253308 - Microcomputer having variable bit width area for displacement and circuit for handling immediate data larger than instruction word (2001-06-26),
10. 6223265 - Single-chip microcomputer synchronously controlling external synchronous memory responsive to memory clock signal and clock enable signal (2001-04-24),
11. 6212620 - Single-chip microcomputer operable in master and slave modes and having configurable bus control terminals (2001-04-03),
12. 6205535 - Branch instruction having different field lengths for unconditional and conditional displacements (2001-03-20),
13. 6131154 - Microcomputer having variable bit width area for displacement (2000-10-10),
14. 6122724 - Central processing unit having instruction queue of 32-bit length (2000-09-19),
15. 5991545 - Microcomputer having variable bit width area for displacement and (1999-11-23),

Title: **The Innovative Contributions of Keiichi Kurakazu**

Introduction: Keiichi Kurakazu, a notable inventor based in Tokorozawa, Japan, has made significant strides in the field of microcomputer technology. With an impressive portfolio of 34 patents, Kurakazu has contributed innovative designs and methods that enhance the efficiency and capabilities of microcomputers.

Latest Patents: Among Kurakazu's most recent patents are two groundbreaking inventions. The first is a microcomputer that utilizes the general-purpose register method, allowing for varied program capacity while maintaining low system costs. This microcomputer simplifies instruction decoding similar to a RISC machine by employing a fixed-length instruction format with a smaller bit number than the maximum data word length for instruction execution. The second patent is for a single-chip microcomputer that features an integral clock generating unit, providing clock signals to the CPU and internal circuit modules, while synchronously controlling external dynamic memory. This design includes three divided internal buses, which help to minimize load capacity on signal transmission paths, thereby facilitating high-speed signal transmission and reducing power dissipation.

Career Highlights: Throughout his career, Keiichi Kurakazu has worked with several prominent companies, including Hitachi, Ltd. His innovative designs and patents have significantly influenced the microcomputer industry, showcasing his technical prowess and forward-thinking approach.

Collaborations: Kurakazu has collaborated with notable coworkers such as Yasushi Akao and Shumpei Kawasaki. Their combined expertise has likely contributed to the development of Kurakazu's innovative inventions.

Conclusion: Keiichi Kurakazu's contributions to microcomputer technology through his extensive patent portfolio exemplify the power of innovation in enhancing efficiency and reducing costs. As he continues to push the boundaries of technology, his work remains a valuable asset to the field of microelectronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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