Tokyo, Japan

Kazutaka Miyano

This inventor holds 45 USPTO granted patents and 2 published patent applications and 1 EPO patent, primarily in Semiconductor Devices. Top assignees: Micron Technology Incorporated, Elpida Memory, Inc., Nec Corporation. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazutaka Miyano. Retrieved from https://idiyas.com/inventor/kazutaka-miyano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 45 

% Patents Active = 68.9

 

Average Co-Inventor Count = 1.4

ph-index = 7

Forward Citations = 202(Granted Patents)


Location History:

  • Chuo-ku, JP (2012 - 2013)
  • Tokyo, JP (2000 - 2017)
  • Sagamihara, JP (2018 - 2023)
  • Kanagawa, JP (2020 - 2023)

Company Filing History:


Years Active: 2000-2026

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Areas of Expertise:
Delay Locked Loop
Clock Transmission
Data Transmission
Command Synchronization
Semiconductor Device
Phase Adjustment
Shifter Circuits
Command Latency Control
Noise Reduction
Voltage Boosting
Duty Detection
Digital DLL Circuit
45 patents (USPTO):Explore Patents

Title: Kazutaka Miyano: Innovator in Semiconductor Technology

Introduction: Kazutaka Miyano, based in Tokyo, Japan, is a prolific inventor with an impressive portfolio of 43 patents. His work primarily focuses on advancements in semiconductor devices, showcasing his expertise in creating solutions that enhance technology efficiency and performance.

Latest Patents: Among his latest patents is the "Apparatuses and methods for deactivating a delay locked loop update in semiconductor devices." This innovation involves a semiconductor device equipped with a delay locked loop (DLL) control circuit that interacts with an update trigger generator and a DLL update circuit. The control circuit is designed to manage the DLL update process based on received signals, regulating the activation and deactivation of the DLL update circuit to optimize memory cell array performance. Another noteworthy patent is the "Apparatus including parallel pipeline control and methods of manufacturing the same," which describes methods, apparatuses, and systems that coordinate timing-critical operations across parallel processing pipelines, enhancing the efficiency of semiconductor processing.

Career Highlights: Kazutaka Miyano has made significant contributions to the semiconductor industry through his roles at notable companies such as Micron Technology Incorporated and Elpida Memory, Inc. His expertise has been instrumental in the development of cutting-edge technologies that drive the field forward.

Collaborations: Throughout his career, Kazutaka has collaborated with talented individuals such as Hiroki Fujisawa and Atsuko Momma. These partnerships have fostered innovation and have combined their skills to tackle complex challenges in semiconductor technology.

Conclusion: Kazutaka Miyano stands out as a leading figure in the realm of semiconductor innovations. His 43 patents reflect his commitment to advancing technology and improving the functionality of semiconductor devices. With his ongoing contributions and collaborations, Miyano continues to shape the landscape of this industry, paving the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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