The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Dec. 23, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Yasuo Satoh, Tsukuba, JP;

Kazutaka Miyano, Sagamihara, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 5/156 (2006.01); G11C 7/22 (2006.01); H03L 7/081 (2006.01); G11C 7/12 (2006.01); G11C 11/4076 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1565 (2013.01); G11C 7/12 (2013.01); G11C 7/222 (2013.01); G11C 11/4076 (2013.01); H03L 7/0812 (2013.01); G11C 7/1018 (2013.01); H03K 3/017 (2013.01);
Abstract

Apparatuses and methods for data transmission offset values in burst transmissions. An example apparatus may include offset logic configured to provide offset values associated with a receiver circuit of a memory device coupled to a signal line. The offset values are based on individual transition threshold voltages biases of sample circuits of the receiver circuit. The example apparatus may further include an input/output (I/O) circuit comprising a driver circuit. The driver circuit configured to receive a logic signal and the offset values and to provide an output signal to the signal line based on the logic signal and to adjust voltages of the output signal based on the offset values.


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