Nagano, Japan

Jyunichi Nakamura


Average Co-Inventor Count = 5.6

ph-index = 6

Forward Citations = 74(Granted Patents)


Company Filing History:


Years Active: 2004-2010

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7 patents (USPTO):Explore Patents

Title: Jyunichi Nakamura: Innovator in Semiconductor Packaging

Introduction

Jyunichi Nakamura is a prominent inventor based in Nagano, Japan. He has made significant contributions to the field of semiconductor packaging, holding a total of 7 patents. His innovative designs aim to enhance the reliability and performance of semiconductor devices.

Latest Patents

Nakamura's latest patents focus on the development of packages for semiconductor devices. One of his notable inventions addresses the prevention of stress in the junction portion between the semiconductor element and the semiconductor package. This design ensures that cracks do not occur, even when a semiconductor element with low strength is mounted. The package is constructed as a laminate of multiple layers, including alternating conducting layers and insulating resin layers. The insulating resin layers are made from a prepreg obtained by impregnating a woven fabric of liquid crystal polymer with an insulating resin. This innovative approach enhances the durability and functionality of semiconductor devices.

Career Highlights

Throughout his career, Jyunichi Nakamura has been associated with Shinko Electric Industries Co., Ltd. His work has significantly impacted the semiconductor industry, particularly in improving the packaging solutions for semiconductor devices. His inventions have paved the way for more reliable and efficient electronic components.

Collaborations

Nakamura has collaborated with notable colleagues, including Tadashi Kodaira and Shunichiro Matsumoto. These partnerships have fostered innovation and contributed to the advancement of semiconductor technology.

Conclusion

Jyunichi Nakamura's contributions to semiconductor packaging demonstrate his commitment to innovation and excellence in the field. His patents reflect a deep understanding of the challenges faced in semiconductor technology and provide effective solutions to enhance device performance.

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