San Jose, CA, United States of America

Joyeeta Nag

This inventor holds 7 USPTO granted patents and 1 published patent application. Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joyeeta Nag. Retrieved from https://idiyas.com/inventor/joyeeta-nag-d3hvxcxq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 7 

% Patents Active = 100.0

Average Co-Inventor Count = 4.2

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2021-2026

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7 patents (USPTO):Explore Patents

Title: Joyeeta Nag: Innovator in Semiconductor Memory Technology

Introduction

Joyeeta Nag is a prominent inventor based in San Jose, California, known for her significant contributions to semiconductor memory technology. With a total of six patents to her name, she has made remarkable advancements in the field of memory devices.

Latest Patents

One of her latest patents is titled "Memory device containing composition-controlled ferroelectric memory elements and method of making the same." This patent describes a semiconductor memory device that features an alternating stack of insulating layers and electrically conductive layers. It includes a memory opening that extends vertically through the stack, along with a fill structure that consists of a vertical stack of discrete ferroelectric material portions and a vertical semiconductor channel. Notably, the discrete ferroelectric material portions may include a ferroelectric alloy material composed of two different dielectric metal oxide materials. In another embodiment, these portions are oxygen-deficient.

Another significant patent is "Bonded memory devices and methods of making the same." This invention outlines a memory device that comprises a first electrically conductive line extending laterally along a horizontal direction. It features a memory pillar structure that contacts this line and includes a vertical stack of a ferroelectric material plate and a selector material plate. Additionally, a second electrically conductive line extends laterally and contacts the memory pillar structure.

Career Highlights

Joyeeta has worked with notable companies such as SanDisk Technologies Inc. and Western Digital Technologies, Inc. Her experience in these organizations has allowed her to develop and refine her innovative ideas in memory technology.

Collaborations

Throughout her career, Joyeeta has collaborated with talented individuals, including Raghuveer S Makala and Bhagwati Prasad. These collaborations have contributed to her success and the advancement of her inventions.

Conclusion

Joyeeta Nag is a trailblazer in the field of semiconductor memory technology, with a strong portfolio of patents that showcase her innovative spirit. Her work continues to influence the development of advanced memory devices, making her a key figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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