Joseph R Hasting

This inventor holds 9 USPTO granted patents and 2 published patent applications. Top assignees: Intel Corporation, Lsi Corporation. Active years: 2013-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph R Hasting. Retrieved from https://idiyas.com/inventor/joseph-r-hasting

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 9 (Patent Applications = 2)

% Patents Active = 55.6

Average Co-Inventor Count = 3.9

ph-index = 2

Forward Citations = 10(Granted Patents)

Location History:

Heidelberg, CT (US) (2013)
Orefield, PA (US) (2014 - 2023)

Company Filing History:

Years Active: 2013-2023

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9 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11709702 - Work conserving, load balancing, and scheduling (2023-07-25),

2. 10929323 - Multi-core communication acceleration using hardware queue device (2021-02-23),

3. 10552205 - Work conserving, load balancing, and scheduling (2020-02-04),

4. 10445271 - Multi-core communication acceleration using hardware queue device (2019-10-15),

5. 10437638 - Method and apparatus for dynamically balancing task processing while maintaining task order (2019-10-08),

6. 10216668 - Technologies for a distributed hardware queue manager (2019-02-26),

7. 8873550 - Task queuing in a multi-flow network processor architecture (2014-10-28),

8. 8677075 - Memory manager for a network communications processor architecture (2014-03-18),

9. 8499137 - Memory manager for a network communications processor architecture (2013-07-30),

Title: Inventor Spotlight: Joseph R. Hasting

Introduction

Joseph R. Hasting, a prominent inventor based in Orefield, PA, has made significant contributions to the field of technology with his innovative designs. With a portfolio of 9 patents, Hasting is recognized for his work in advancing network processing systems and multi-core communication.

Latest Patents

Among Hasting's latest innovations is a patent focused on "Work Conserving, Load Balancing, and Scheduling." This invention encompasses a system and method that utilize a network processor to optimize task distribution across multiple processing cores. The scheduling circuit detects critical sequences of tasks and balances load intelligently among destination processing cores to enhance efficiency.

Additionally, Hasting has developed a patent for "Multi-Core Communication Acceleration Using Hardware Queue Device." This invention introduces a hardware queue management device aimed at reducing inter-core data transfer overhead. It offloads request management and data coherency tasks from the CPU cores, thereby optimizing communication and minimizing core stalls.

Career Highlights

Joseph R. Hasting has an impressive career in technology, having worked with industry leaders such as Intel Corporation and LSI Corporation. His experience at these organizations has greatly influenced his approach to innovation and invention in the field of network processing and communication systems.

Collaborations

Throughout his career, Hasting has collaborated with esteemed professionals like William G. Burroughs and David Sonnier. These collaborations have fostered a creative environment that has enabled groundbreaking developments in technology.

Conclusion

Joseph R. Hasting's contributions to technology, reflected through his patents and collaborations, showcase his inventive spirit and dedication to innovation. His work continues to influence the advancements in network systems and multi-core processors, establishing him as a notable figure in the realm of invention.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: