Joseph E Herbst

Title: Joseph E Herbst: Innovator in Integrated Circuit Technology

Introduction

Joseph E Herbst is a notable inventor based in Milpitas, CA (US). He holds a total of 3 patents that showcase his contributions to the field of integrated circuit technology. His work has significantly impacted the design and functionality of memory devices.

Latest Patents

One of his latest patents is for an "Integrated circuit memory with a bus transceiver." This invention describes a two-port high-speed integrated circuit memory device that includes a bus transceiver, a memory array, and a decoder. The design allows for high-speed access to the internal memory array via low capacitive load address and data buses. Additionally, it buffers a secondary bus to provide access to slower-speed local devices. The bus transceiver facilitates the transfer of address, data, and control signals between the primary and secondary ports while minimizing capacitive loading through the use of buffers. The decoder decodes memory chip select signals and control signals that define the operational mode of the device. To conserve power, the invention includes an operational mode where primary bus signals are not reflected to the secondary bus unless the internal memory array is not selected. An enhanced mode features a ready signal generator and converts chip select lines into additional address input lines.

Another significant patent is the "Method and apparatus for providing a readable and writable cache tag." This invention involves a Cache Memory Controller that operates with a TAG Random Access Memory (TAG RAM) connected to the lower order bits on a host address bus. The controller selects data to be written to TAG RAM from multiple sources, including snoop address signals and invalidating signals. During read operations, the TAG RAM generates an n-bit TAG data output signal based on the lower order bits of the address. If this output matches the higher order bits on the host address bus, a hit is indicated. If not, the higher order bits are written into the TAG RAM, and data from main memory is loaded into the cache memory.

Career Highlights

Joseph E Herbst has worked with prominent companies in the technology sector, including National Semiconductor Corporation and Integrated Silicon Solutions Incorporated. His experience in these organizations has contributed to his expertise in integrated circuit design and memory technology.

Collaborations

Throughout his career, Joseph has collaborated with notable individuals such as Jamie J LeVasseur and Ian Edward Davis. These collaborations have likely enriched his work and contributed to