Vancouver, WA, United States of America

John P Stirniman

This inventor holds 6 USPTO granted patents. Top assignee: Synopsys, Inc.. Active years: 2007-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: John P Stirniman. Retrieved from https://idiyas.com/inventor/john-p-stirniman

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.8

ph-index = 4

Forward Citations = 36(Granted Patents)


Company Filing History:


Years Active: 2007-2013

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6 patents (USPTO):Explore Patents

Title: John P. Stirniman: Innovations in High-Accuracy Mask Synthesis

Introduction

John P. Stirniman is an inventor based in Vancouver, Washington. His work includes techniques for improving the accuracy and efficiency of mask synthesis, a process used in semiconductor manufacturing. He is associated with Synopsys, Inc. Stirniman is credited with 6 patents.

Latest Patents

“Flash-Based Anti-Aliasing Techniques for High-Accuracy, High-Efficiency Mask Synthesis” describes systems for converting a non-bandlimited pattern layout into a band-limited pattern image. The method uses an anti-aliasing filter and a lookup table of precomputed convolution values. It applies a grid map to the layout and uses the lookup table to generate the resulting image.

“Flash-Based Updating Techniques for High-Accuracy, High-Efficiency Mask Synthesis” addresses how to calculate the effects of layout changes during optical proximity correction (OPC). The system convolves a pattern layout with lithography model kernels, then uses model flash lookup tables to determine how a perturbation affects convolution values at a selected location. It combines those values with the existing results to update the pattern’s modeled effects.

Career Highlights

Stirniman’s described inventions focus on computational methods for mask synthesis and OPC. By using precomputed lookup tables to handle filtering and layout perturbations, these techniques aim to support accurate calculations while reducing computational effort.

Collaborations

Stirniman is associated with Synopsys, Inc. His listed coworkers include Micheal D. Cranford and Michael Lawrence Rieger.

Conclusion

John P. Stirniman’s patent work centers on efficient, high-accuracy methods for processing semiconductor pattern layouts, including anti-aliasing and updates to OPC calculations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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