Synopsys, Inc.

John P Stirniman

Micheal D Cranford

Michael Lawrence Rieger

Dan Beale

Jim Shiely

Techniques and systems for converting a non-bandlimited pattern layout into a band-limited pattern image are described. During operation, the system receives the non-bandlimited pattern layout which comprises one or more polygons. The system further receives an anti-aliasing filter (AAF) kernel, wherein the AAF kernel is configured to convert a non-bandlimited pattern into a band-limited pattern. The system then constructs an AAF lookup table for the AAF kernel, wherein the AAF lookup table contains precomputed values for a set of convolution functions which are obtained by convolving a set of basis functions with the AAF kernel. Next, the system creates a sampled pattern layout by applying a grid map over the pattern layout. The system then obtains the band-limited pattern image by using the AAF lookup table to convolve the AAF kernel with each grid location in the sampled pattern layout.

Flash-based anti-aliasing techniques for high-accuracy high-efficiency mask synthesis

An embodiment of the present invention provides a system that computes the effect of perturbations to a pattern layout during an OPC process. During operation, the system receives a pattern layout and a set of lithography model kernels. The system then obtains a set of convolved patterns by convolving the pattern layout with each of the set of lithography model kernels. The system additionally receives a perturbation pattern to be added onto the pattern layout. Next, for a query location on the pattern layout, the system obtains a set of convolution values at the query location by using model flash lookup tables to convolve the perturbation pattern with the set of lithography model kernels. The system then updates the set of convolved patterns at the query location to account for the effect of the perturbation pattern by combining the set of convolution values with the set of convolved patterns.

Flash-based updating techniques for high-accuracy high efficiency mask synthesis

One embodiment of the present invention provides a system that converts a non-bandlimited pattern layout into a band-limited pattern image to facilitate simulating an optical lithography process. During operation, the system receives the non-bandlimited pattern layout which comprises one or more polygons. The system further receives an anti-aliasing filter (AAF) kernel, wherein the AAF kernel is configured to convert a non-bandlimited pattern into a band-limited pattern. The system then constructs an AAF lookup table for the AAF kernel, wherein the AAF lookup table contains precomputed values for a set of convolution functions which are obtained by convolving a set of basis functions with the AAF kernel. Next, the system creates a sampled pattern layout by applying a grid map over the pattern layout. The system then obtains the band-limited pattern image by using the AAF lookup table to convolve the AAF kernel with each grid location in the sampled pattern layout.

Flash-based anti-aliasing techniques for high-accuracy high efficiency mask synthesis

A memory is encoded with a model of sensitivity of a distorted layout generated by simulation of a wafer fabrication process, with respect to a change in an original layout that is input to the simulation. The sensitivity model comprises an expression of convolution of the original layout with spatial functions ('kernels') that are identical to kernels of a process model used in the simulation. A difference between the distorted layout and the original layout is computed, and the difference is divided by a sensitivity value which is obtained directly by evaluating the kemel-based sensitivity model, and the result is used to identify a proximity correction (such as serif size or contour movement) to be made to the original layout. Use of a sensitivity model based on a process model's kernels eliminates a second application of the process model to evaluate sensitivity, thereby to reduce memory and computation requirements.

Model of sensitivity of a simulated layout to a change in original layout, and use of model in proximity correction

One embodiment of the present invention provides a system that calculates etch proximity-correction during an OPC (Optical Proximity Correction) process. During operation, the system receives a layout for an integrated circuit. Next, the system selects a target point on an edge in the layout. The system then creates a list of edges within an ambit of the target point. Next, the system removes edges from the list that are not visible from the target point. The system then computes a line integral of a statistical function over the remaining edges in the list, wherein the line integral of the statistical function models the etch proximity effects correlated with positions of the edges visible from the target point. Next, the calculated etch proximity-correction is applied to an area in proximity to the target point.

Calculating etch proximity-correction using object-precision techniques

One embodiment of the present invention provides a system that calculates etch proximity-correction during an OPC (Optical Proximity Correction) process. During operation, the system receives a layout for an integrated circuit. Next, the system selects a target point on an edge in the layout. The system then casts a plurality of rays from the target point, and constructs a plurality of pie-wedges based on the cast rays. The system then computes a surface integral of a statistical function over the pie-wedges, wherein the surface integral of the statistical function models the etch bias at the target point. Next, the calculated etch proximity-correction is applied to an area in proximity to the target point.

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Vancouver, WA, United States of America

John P Stirniman