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For the Inventor, By the Inventor

San Francisco, CA, United States of America

John G Favor

USPTO Granted Patents = 66 

Average Co-Inventor Count = 2.0

ph-index = 2

Forward Citations = 29(Granted Patents)

Forward Citations (Not Self Cited) = 11(Dec 10, 2025)


Company Filing History:

goldMedal62 out of 66 
 
Ventana Micro Systems Inc.
 patents
where one patent can have more than one assignee

Years Active: 2022-2025

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Areas of Expertise:
Microprocessor Architecture
Branch Target Buffer
Cache Coherency
Store-to-Load Forwarding
Translation Context
Side Channel Attacks
Physical Address Proxies
Instruction Fetch Pipeline
Macro-op Cache
Load Instruction Re-execution
Data TLB Management
Performance Optimization
66 patents (USPTO):Explore Patents
1. 12499050 - Physical address proxy (PAP) residency determination for reduction of PAP reuse (2025-12-16),
2. 12498933 - Prediction unit that predicts successor fetch block start address of multi-fetch block macro-op cache entry (2025-12-16),
3. 12498929 - Microprocessor that performs partial fallback abort processing of multi-fetch block macro-op cache entries (2025-12-16),
4. 12498928 - Microprocessor that builds multi-fetch block macro-op cache entries in two-stage process (2025-12-16),
5. 12498927 - Microprocessor that allows same-fetch block start address co-residence of unrolled loop multi-fetch block macro-op cache entry and loop body macro-op cache entry used to build same (2025-12-16),
6. 12498926 - Microprocessor that builds consistent loop iteration count unrolled loop multi-fetch block macro-op cache entries (2025-12-16),
7. 12493558 - Using physical address proxies to accomplish penalty-less processing of load/store instructions whose data straddles cache line address boundaries (2025-12-09),
8. 12493469 - Microprocessor that extends sequential multi-fetch block macro-op cache entries (2025-12-09),
9. 12493468 - Microprocessor that performs mid-macro-op cache entry restart abort processing (2025-12-09),
10. 12493466 - Microprocessor that builds inconsistent loop that iteration count unrolled loop multi-fetch block macro-op cache entries (2025-12-09),
11. 12487939 - Virtually-indexed cache coherency using physical address proxies (2025-12-02),
12. 12487936 - Store-to-load forwarding correctness checks using physical address proxies stored in load queue entries (2025-12-02),
13. 12487926 - Prediction unit that predicts branch history update information produced by multi-fetch block macro-op cache entry (2025-12-02),
14. 12487830 - Prediction unit with first predictor that provides a hashed fetch address of a current fetch block to its own input and to a second predictor that uses it to predict the fetch address of a next fetch block (2025-12-02),
15. 12481310 - Method and apparatus for deskewing die to die communication between system on chip devices (2025-11-25),

Title: Innovations by John G Favor: A Pioneer in Microprocessor Technology

Introduction: John G Favor, based in San Francisco, CA, is an esteemed inventor with a remarkable portfolio of 45 patents. His contributions to the field of microprocessor technology have significantly advanced the understanding and implementation of secure processing in modern computing systems.

Latest Patents: Among his latest inventions, Favor developed a microprocessor that effectively prevents store-to-load forwarding between different translation contexts. This innovative processor addresses vulnerabilities related to side channel attacks (SCAs) by detecting changes in translation contexts and managing store-to-load operations diligently. In another recent patent, he designed efficient macro-op cache data entry pointers for a microprocessor. This invention improves the management of macro-op (MOP) cache, optimizing performance through a systematic approach that utilizes set-associative tag RAM and a program order for data fetching.

Career Highlights: John G Favor has remained at the forefront of technological innovation, particularly in microprocessors. His work at Ventana Micro Systems Inc. has positioned him as a key figure in leveraging advancements in processing technology to enhance security and performance in computing.

Collaborations: Favor collaborates with talented professionals such as Srivatsan Srinivasan and Michael N Michael. Together, they are pushing the boundaries of what is possible in microprocessor design and functionality.

Conclusion: With a prolific record of patents and continuous innovation, John G Favor is a pivotal player in the technology sector. His groundbreaking work at Ventana Micro Systems Inc. demonstrates a commitment to advancing the capabilities and security of microprocessors, ensuring a safer and more efficient future in computing.

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