The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Oct. 09, 2024
Ventana Micro Systems Inc., Cupertino, CA (US);
John G. Favor, San Francisco, CA (US);
Srivatsan Srinivasan, Cedar Park, TX (US);
Robert Haskell Utley, Austin, TX (US);
Ventana Micro Systems Inc., Cupertino, CA (US);
Abstract
A system and method for a cache memory subsystem including a first-level cache (L1) and an N-way set associative second-level cache (L2) inclusive of L1, including receiving a physical memory line address (PMLA) for allocation into L2, using a set index of the PMLA to select a set of N ways of L2, for each way of the selected set of N ways, forming a physical address proxy (PAP) for the PMLA, in which each formed PAP includes the set index portion and the corresponding way that uniquely identifies a corresponding one of the selected set of N ways of L2, for each of the N formed PAPs, receiving a corresponding indicator of whether the formed PAP is resident in L1, and selecting one of the selected N ways of L2 having a corresponding indicator indicating that the corresponding one of the N formed PAPs is not resident in L1.