Chongqing, China

Jie Pu

This inventor holds 5 USPTO granted patents. Top assignees: No. 24 Research Institute of China Electronics Technology Group Corporation, China Electronic Technology Corporation, 24Th Research Institute, No. 24 Research Institute of China Electronic Technology Corporation. Active years: 2019-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jie Pu. Retrieved from https://idiyas.com/inventor/jie-pu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 80.0

Average Co-Inventor Count = 9.9

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2019-2022

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5 patents (USPTO):Explore Patents

Title: Jie Pu: Innovator in Clock Generation and Error Correction Systems

Introduction

Jie Pu is a notable inventor based in Chongqing, China. He has made significant contributions to the field of electronics, particularly in the development of circuits for clock generation and error correction systems. With a total of 5 patents, his work has advanced the performance of analog-to-digital converters and related technologies.

Latest Patents

One of Jie Pu's latest patents is titled "Circuit for generating multi-phase clock having random disturbance added thereto." This invention provides a circuit that generates a multi-phase clock with random disturbances, enhancing the performance of high-precision time interleaving analog-to-digital converters (TI ADCs). The circuit includes a main clock module, a random signal generation module, and a buffer matrix switch module, which collectively ensure that clock phase errors are minimized in real-time.

Another significant patent is the "Error compensation correction system and method for analog-to-digital converter with time interleaving structure." This system includes various components such as a master clock module and an error correction module, designed to improve the stability and performance of time interleaving ADCs. The method ensures lower hardware implementation complexity while effectively correcting interchannel mismatch errors.

Career Highlights

Jie Pu has worked at prominent organizations, including the 24th Research Institute of China Electronics Technology Group Corporation and China Electronic Technology Corporation. His experience in these institutions has allowed him to collaborate on innovative projects that push the boundaries of electronic technology.

Collaborations

Throughout his career, Jie Pu has collaborated with notable colleagues, including Gangyi Hu and Dongbing Fu. Their combined expertise has contributed to the successful development of advanced electronic systems.

Conclusion

Jie Pu's contributions to the field of electronics, particularly in clock generation and error correction systems, highlight his innovative spirit and technical expertise. His patents reflect a commitment to enhancing the performance of electronic devices, making him a significant figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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