Hwaseong, South Korea

Ji-Woon Im

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2016-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ji-Woon Im. Retrieved from https://idiyas.com/inventor/ji-woon-im-gdvf6sml

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 5.8

ph-index = 2

Forward Citations = 21(Granted Patents)


Location History:

  • Gyeonggi-do, KR (2016)
  • Seoul, KR (2016)
  • Hwaseong-si, KR (2022)

Company Filing History:


Years Active: 2016-2022

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3 patents (USPTO):Explore Patents

Title: Ji-Woon Im: Innovator in Memory Device Technology

Introduction

Ji-Woon Im is a prominent inventor based in Hwaseong-si, South Korea. He has made significant contributions to the field of memory device technology, holding a total of 3 patents. His work primarily focuses on innovative methods for manufacturing vertical memory devices.

Latest Patents

One of Ji-Woon Im's latest patents is titled "Methods of manufacturing a vertical memory device." This patent describes a method where a first sacrificial layer, including a nitride, is formed on a substrate. A mold is created with an insulation layer and a second sacrificial layer that are alternately and repeatedly stacked on the first sacrificial layer. The insulation layer and the second sacrificial layer consist of a first oxide and a second oxide, respectively. A channel is formed through the mold and the first sacrificial layer, and an opening is created to expose the upper surface of the substrate. The first sacrificial layer is then removed through this opening to form a first gap, followed by the formation of a channel connecting pattern to fill the gap. The second sacrificial layer is ultimately replaced with a gate electrode.

Another notable patent is for a "Nonvolatile memory device and a method for fabricating the same." This invention includes a substrate with a cell array region and a connection region. An electrode structure is formed on both regions, consisting of multiple laminated electrodes. The design features a first recess in the electrode structure on the connection region, positioned between the cell array region and a second recess. Additionally, a plurality of vertical wirings is formed on the exposed electrodes by the first recess.

Career Highlights

Ji-Woon Im is currently employed at Samsung Electronics Co., Ltd., a leading company in the technology sector. His work at Samsung has allowed him to push the boundaries of memory device technology and contribute to advancements in the field.

Collaborations

Throughout his career, Ji-Woon Im has collaborated with notable colleagues, including Kyung-Tae Jang and Sang-Hoon Lee. These collaborations have further enhanced his innovative capabilities and contributed to the success of his projects.

Conclusion

Ji-Woon Im is a distinguished inventor whose work in memory device technology has led to significant advancements in the field. His innovative patents and contributions at Samsung Electronics Co., Ltd. highlight his expertise and commitment to technological progress

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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