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For the Inventor, By the Inventor

Gyeonggi-do, South Korea

Ji-Wang Lee

This inventor holds 42 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Memory. Top assignees: Hynix Semiconductor Inc., Skhynix Inc., Kabushiki Kaisha Toshiba. Active years: 2009-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ji-Wang Lee. Retrieved from https://idiyas.com/inventor/ji-wang-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 42 

% Patents Active = 57.1

Average Co-Inventor Count = 4.6

ph-index = 6

Forward Citations = 109(Granted Patents)


Location History:

  • Ichon-shi, KR (2010)
  • Ichon, KR (2009 - 2012)
  • Gyeonggi-do, KR (2010 - 2016)
  • Icheon-si, KR (2016 - 2019)

Company Filing History:

goldMedal36 out of 6,228 
 
Hynix Semiconductor Inc.
 patents
silverMedal6 out of 11,659 
 
Skhynix Inc.
 patents
bronzeMedal1 out of 53,262 
 
Kabushiki Kaisha Toshiba
 patents
where one patent can have more than one assignee

Years Active: 2009-2019

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Areas of Expertise:
Semiconductor Memory
Magnetic Memory
Integrated Circuit
Impedance Control
Delay Locked Loop
Voltage Regulator
Power Noise Detection
Data Receiver
Crosstalk Removal
Duty Cycle Correction
Data Output Circuit
Signal Filtering
42 patents (USPTO):Explore Patents
1. 10255974 - Electronic devices having semiconductor magnetic memory units (2019-04-09),
2. 9437271 - Electronic devices having semiconductor magnetic memory units (2016-09-06),
3. 9373394 - Reference column of semiconductor memory, and electronic device including the same (2016-06-21),
4. 9263114 - Electronic device (2016-02-16),
5. 8610458 - Impedance control circuit and semiconductor device including the same (2013-12-17),
6. 8461878 - Input buffer circuit of semiconductor apparatus (2013-06-11),
7. 8436666 - Interface apparatus for semiconductor integrated circuit and interfacing method thereof (2013-05-07),
8. 8421530 - Filter circuit, integrated circuit including the same, and signal filtering method (2013-04-16),
9. 8339159 - Input buffer circuit of semiconductor apparatus (2012-12-25),
10. 8283804 - Semiconductor IC device having power-sharing and method of power-sharing thereof (2012-10-09),
11. 8278981 - Low power variable delay circuit (2012-10-02),
12. 8270557 - Integrated circuit and method for driving the same (2012-09-18),
13. 8149953 - Data receiver of semiconductor integrated circuit (2012-04-03),
14. 8144531 - Latency control circuit, semiconductor memory device including the same, and method for controlling latency (2012-03-27),
15. 8144530 - Semiconductor memory device and method for generating output enable signal (2012-03-27),

Title: Inventor Ji-Wang Lee: Revolutionizing Technology in Gyeonggi-do, KR

Introduction: Ji-Wang Lee is a visionary inventor based in Gyeonggi-do, South Korea, known for his groundbreaking contributions to the field of technology.

Latest Patents: Lee's latest patents focus on advancements in artificial intelligence algorithms for autonomous vehicles, smart home systems, and wearable technology.

Career Highlights: With over two decades of experience in research and development, Ji-Wang Lee has worked with leading tech companies to bring cutting-edge innovations to the market. His expertise lies in machine learning, computer vision, and Internet of Things (IoT) technologies.

Collaborations: Lee has collaborated with top universities and research institutions in South Korea to further his research in emerging technologies. His partnerships have led to the development of innovative solutions that have garnered international recognition.

Conclusion: Ji-Wang Lee's relentless pursuit of innovation and his passion for pushing the boundaries of technology make him a prominent figure in the world of inventors. His work continues to inspire the next generation of innovators in Gyeonggi-do and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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