The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2013
Filed:
Dec. 30, 2009
Ji-wang Lee, Gyeonggi-do, KR;
Yong-ju Kim, Gyeonggi-do, KR;
Hee-woong Song, Gyeonggi-do, KR;
Ic-su OH, Gyeonggi-do, KR;
Hyung-soo Kim, Gyeonggi-do, KR;
Tae-jin Hwang, Gyeonggi-do, KR;
Hae-rang Choi, Gyeonggi-do, KR;
Jae-min Jang, Gyeonggi-do, KR;
Chang-kun Park, Gyeonggi-do, KR;
Ji-Wang Lee, Gyeonggi-do, KR;
Yong-Ju Kim, Gyeonggi-do, KR;
Hee-Woong Song, Gyeonggi-do, KR;
Ic-Su Oh, Gyeonggi-do, KR;
Hyung-Soo Kim, Gyeonggi-do, KR;
Tae-Jin Hwang, Gyeonggi-do, KR;
Hae-Rang Choi, Gyeonggi-do, KR;
Jae-Min Jang, Gyeonggi-do, KR;
Chang-Kun Park, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Abstract
An interface apparatus for a semiconductor integrated circuit and an interfacing method thereof controls the VOX of differential signals to a target level in response to the differential signals being outputted by an output block. The interface apparatus for a semiconductor integrated circuit includes an output block configured to output differential signals output by an internal circuit a detector configured to detect a timing error of the differential signals; and a controller configured to control a timing of the differential signals output by the internal circuit according to a detection result of the detector.