Jae-Min Jang

This inventor holds 36 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Technology. Top assignees: Hynix Semiconductor Inc., Skhynix Inc.. Active years: 2010-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae-Min Jang. Retrieved from https://idiyas.com/inventor/jae-min-jang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 36 (Patent Applications = 3)

% Patents Active = 72.2

Average Co-Inventor Count = 6.0

ph-index = 6

Forward Citations = 94(Granted Patents)

Location History:

Ichon-shi, KR (2010)
Ichon, KR (2010 - 2012)
Gyeonggi-do, KR (2010 - 2016)

Company Filing History:

28 out of 6,228

Hynix Semiconductor Inc.

Years Active: 2010-2016

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Areas of Expertise:

Semiconductor Device

Duty Cycle Correction

Phase Locked Loop

Integrated Circuit

Low Power Circuit

Memory Device

Voltage Regulator

Data Input/Output

Sampling Circuit

Power Noise Control

Latency Control

Receiver Circuit

36 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9361969 - Semiconductor device and method for driving the same (2016-06-07),

2. 9257968 - Duty cycle correction circuit and operation method thereof (2016-02-09),

3. 9225316 - Duty cycle correction circuit and operation method thereof (2015-12-29),

4. 9128511 - Semiconductor device and operation method thereof (2015-09-08),

5. 9018994 - Duty cycle correction circuit and operation method thereof (2015-04-28),

6. 8686768 - Phase locked loop (2014-04-01),

7. 8633762 - Integrated circuit chip and transmitting /receiving system including the same (2014-01-21),

8. 8610475 - Integrated circuit (2013-12-17),

9. 8542044 - Semiconductor integrated circuit and method for driving the same (2013-09-24),

10. 8461878 - Input buffer circuit of semiconductor apparatus (2013-06-11),

11. 8436666 - Interface apparatus for semiconductor integrated circuit and interfacing method thereof (2013-05-07),

12. 8410836 - Phase locked loop (2013-04-02),

13. 8368446 - Delay locked loop (2013-02-05),

14. 8339159 - Input buffer circuit of semiconductor apparatus (2012-12-25),

15. 8319535 - Delay locked loop (2012-11-27),

Title: Jae-Min Jang: Pioneering Inventor from Gyeonggi-do, KR

Introduction: Jae-Min Jang is a highly respected inventor hailing from the vibrant region of Gyeonggi-do, South Korea. With a passion for innovation and a keen eye for detail, he has made significant contributions to the field of technology through his groundbreaking inventions.

Latest Patents: Jae-Min Jang holds several patents in the areas of electronics and telecommunications, showcasing his expertise in developing cutting-edge solutions for modern challenges. His most recent patents focus on enhancing data security in mobile devices and improving wireless communication technologies.

Career Highlights: Throughout his illustrious career, Jae-Min Jang has worked with top research institutions and leading tech companies to bring his ideas to life. His innovative approach to problem-solving has led to the successful development of products that have revolutionized the industry.

Collaborations: Jae-Min Jang is known for his collaborative spirit, often partnering with fellow inventors, engineers, and designers to create synergistic solutions that push the boundaries of what is possible. His ability to work effectively in team settings has resulted in the creation of groundbreaking technologies that have had a lasting impact.

Conclusion: In conclusion, Jae-Min Jang stands as a visionary inventor whose dedication to innovation and commitment to excellence have solidified his reputation as a trailblazer in the world of technology. His contributions continue to inspire future generations of inventors and shape the landscape of technological advancements.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

3 patents pending: