The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2013
Filed:
Dec. 22, 2011
Yong-ju Kim, Gyeonggi-do, KR;
Dae-han Kwon, Gyeonggi-do, KR;
Hae-rang Choi, Gyeonggi-do, KR;
Jae-min Jang, Gyeonggi-do, KR;
Yong-Ju Kim, Gyeonggi-do, KR;
Dae-Han Kwon, Gyeonggi-do, KR;
Hae-Rang Choi, Gyeonggi-do, KR;
Jae-Min Jang, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Abstract
A semiconductor integrated circuit includes: a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a source clock signal by a first delay time for obtaining a lock, wherein an update period of the DLL is controlled in response to an update period control signal after locking is completed; and an update period controller configured to generate the update period control signal based on a second delay time occurring in a loop path of the DLL in response to the source clock signal and a plurality of control signals provided from the DLL.