Jerry Pirog

USPTO Granted Patents = 11 (Patent Applications = 1)

Average Co-Inventor Count = 3.4

ph-index = 3

Forward Citations = 25(Granted Patents)

Company Filing History:

1 out of 832,680

Other

patents

Years Active: 2013-2021

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11 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 10929323 - Multi-core communication acceleration using hardware queue device (2021-02-23),

2. 10445271 - Multi-core communication acceleration using hardware queue device (2019-10-15),

3. 10437638 - Method and apparatus for dynamically balancing task processing while maintaining task order (2019-10-08),

4. 10216668 - Technologies for a distributed hardware queue manager (2019-02-26),

5. 9444757 - Dynamic configuration of processing modules in a network communications processor architecture (2016-09-13),

6. 8949582 - Changing a flow identifier of a packet in a multi-thread, multi-flow network processor (2015-02-03),

7. 8943507 - Packet assembly module for multi-core, multi-thread network processors (2015-01-27),

8. 8935483 - Concurrent, coherent cache access for multiple threads in a multi-core, multi-thread network processor (2015-01-13),

9. 8910171 - Thread synchronization in a multi-thread network communications processor architecture (2014-12-09),

10. 8874878 - Thread synchronization in a multi-thread, multi-flow network communications processor architecture (2014-10-28),

11. 8537832 - Exception detection and thread rescheduling in a multi-core, multi-thread network processor (2013-09-17),

Title: Jerry Pirog: Innovator in Multi-Core Communication Acceleration

Introduction

Jerry Pirog is a notable inventor based in Easton, PA, with a remarkable portfolio of 11 patents. His work primarily focuses on enhancing communication efficiency in multi-core processors, which is crucial for modern computing.

Latest Patents

Among his latest innovations is a patent for a multi-core communication acceleration system utilizing a hardware queue device. This invention aims to reduce inter-core data transfer overhead by offloading request management and data coherency tasks from the CPU cores. The apparatus includes multi-core processors, a shared L3 or last-level cache (LLC), and a hardware queue management device designed to receive, store, and process inter-core data transfer requests. Additionally, the hardware queue management device features a resource management system that controls the rate at which cores may submit requests, thereby minimizing core stalls and dropped requests. Software instructions are also introduced to optimize communication between the cores and the queue management device.

Career Highlights

Jerry Pirog has had a distinguished career, contributing his expertise to prominent companies such as LSI Corporation and Intel Corporation. His work in these organizations has significantly advanced the field of multi-core processing and communication technologies.

Collaborations

Throughout his career, Jerry has collaborated with notable professionals, including James T. Clee and Deepak Mital. These collaborations have further enriched his contributions to the field of technology.

Conclusion

Jerry Pirog's innovative work in multi-core communication acceleration has made a significant impact on the technology landscape. His patents and career achievements reflect his dedication to advancing computing efficiency and performance.

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