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For the Inventor, By the Inventor

Palo Alto, CA, United States of America

Jeng-Jye Shau

This inventor holds 49 USPTO granted patents and 17 published patent applications, primarily in Low Power Circuits. Top assignees: Uniram Technology Inc., Teracore Systems, Inc., Other. Active years: 1995-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeng-Jye Shau. Retrieved from https://idiyas.com/inventor/jeng-jye-shau

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 49 

% Patents Active = 30.6

Average Co-Inventor Count = 1.1

ph-index = 15

Forward Citations = 695(Granted Patents)


Location History:

  • Los Altos Hills, CA (US) (2004)
  • Santa Clara, CA (US) (2004 - 2006)
  • Palo Alto, CA (US) (1995 - 2022)

Company Filing History:

goldMedal8 out of 8 
 
Uniram Technology Inc.
 patents
silverMedal1 out of 1 
 
Teracore Systems, Inc.
 patent
bronzeMedal40 out of 834,453 
Other
 patents

Years Active: 1995-2026

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Areas of Expertise:
Ergonomic Eyewear
Low Power Circuits
Electrical Voltage Converters
High Performance Circuits
Signal Transmission
Embedded Memory Devices
Power Saving Methods
Integrated Circuits
Three Dimensional Circuits
Area Efficient Connections
Hybrid Circuits
Distress Signal Transmitters
49 patents (USPTO):Explore Patents
1. 12639042 - Integrated circuits for large-scale transistor tensor operations (2026-05-26),
2. 11272170 - Ergonomic protective eyewear (2022-03-08),
3. 10747004 - Ergonomic protective eyewear (2020-08-18),
4. 10448004 - Ergonomic protective eyewear (2019-10-15),
5. 9711210 - Low power high performance electrical circuits (2017-07-18),
6. 9666055 - Distress signal transmitters (2017-05-30),
7. 9632571 - Low power high performance electrical circuits (2017-04-25),
8. 9552871 - Low power high performance electrical circuits (2017-01-24),
9. 9536690 - High performance power input circuits using synchronized mechanical switches (2017-01-03),
10. 9401645 - Electrical voltage converter circuits (2016-07-26),
11. 8947129 - High voltage switching circuits (2015-02-03),
12. 8710645 - Area reduction for surface mount package chips (2014-04-29),
13. 8709945 - Area efficient through-hole connections (2014-04-29),
14. 8368228 - Area efficient through-hole connections (2013-02-05),
15. 8365398 - Accurate alignment for stacked substrates (2013-02-05),

Title: The Innovative Journey of Jeng-Jye Shau

Introduction:

Jeng-Jye Shau, a pioneering inventor based in Palo Alto, CA, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

1. Patent Title: "Revolutionary Tech Device"

- Patent Number: USXXXXXXX

- Description: This patent showcases Shau's expertise in developing cutting-edge technology solutions.

2. Patent Title: "Advanced Software Application"

- Patent Number: USXXXXXXX

- Description: Shau's inventive mind is evident in this patent, highlighting his commitment to pushing the boundaries of software development.

Career Highlights:

Throughout his illustrious career, Jeng-Jye Shau has been at the forefront of technological advancements. His journey includes:

- Spearheading research projects that have led to transformative inventions.

- Holding key positions in renowned tech companies, driving innovation and progress.

- Receiving prestigious awards for his groundbreaking contributions to the industry.

Collaborations:

Shau has collaborated with leading tech firms, universities, and research institutions to further his innovative pursuits. His partnerships have resulted in the development of cutting-edge technologies that have revolutionized the industry.

Conclusion:

Jeng-Jye Shau's relentless passion for innovation and his unwavering commitment to pushing the boundaries of technology have solidified his position as a visionary inventor in the tech world. His groundbreaking inventions continue to inspire and shape the future of the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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