Jen-Yang Wen

Title: The Innovative Contributions of Jen-Yang Wen

Introduction

Jen-Yang Wen is a notable inventor based in Hualien, Taiwan. He has made significant contributions to the field of integrated circuit design, particularly through his innovative patent. His work has implications for the efficiency and effectiveness of electronic devices.

Latest Patents

One of Jen-Yang Wen's key patents is titled "Method for creating test clock domain during integrated circuit design, and associated computer readable medium." This patent describes a method for creating a clock domain in the layout of an integrated circuit. The method involves a test circuit that includes a plurality of first scan cells and second scan cells, arranged in two separate scan chains. The process includes determining whether a specific region in the layout requires a test clock domain adjustment based on the densities of these scan cells. If an adjustment is needed, at least one first scan cell is arranged to be on the second scan chain. This innovative approach enhances the design and testing of integrated circuits.

Career Highlights

Throughout his career, Jen-Yang Wen has worked with prominent organizations such as Global Unichip Corporation and National Taiwan University. His experience in these institutions has allowed him to refine his skills and contribute to advancements in integrated circuit technology.

Collaborations

Jen-Yang Wen has collaborated with esteemed colleagues, including Chih-Mou Tseng and Ming-Tung Chang. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Jen-Yang Wen's contributions to integrated circuit design through his patent and collaborative efforts highlight his role as an influential inventor in the field. His work continues to impact the development of electronic technologies.