Hsinchu, Taiwan

I-Hsiu Lo


Average Co-Inventor Count = 4.0

ph-index = 1


Location History:

  • Hsinchu, TW (2021)
  • Hsinchu County, TW (2021)

Company Filing History:


Years Active: 2021-2025

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3 patents (USPTO):Explore Patents

Title: Biography of I-Hsiu Lo

Introduction: I-Hsiu Lo is an accomplished inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of integrated circuit design, holding two patents that showcase his innovative approach to technology.

Latest Patents: I-Hsiu Lo's latest patents include a "Clock deadlock detecting system, method, and non-transitory computer readable storage medium." This invention involves a system that utilizes a memory and a processor to detect potential deadlock states in integrated clock gating cells. His second patent is a "Method of detecting a circuit malfunction and related device," which focuses on identifying malfunctions during the register transfer level design stage.

Career Highlights: I-Hsiu Lo is currently employed at Realtek Semiconductor Inc., where he applies his expertise in integrated circuit design. His work has been instrumental in advancing the reliability and efficiency of electronic circuits.

Collaborations: Throughout his career, I-Hsiu Lo has collaborated with notable colleagues, including Yung-Jen Chen and Yu-Lan Lo. These partnerships have fostered a creative environment that encourages innovation and problem-solving.

Conclusion: I-Hsiu Lo's contributions to the field of integrated circuits and his innovative patents reflect his dedication to advancing technology. His work continues to influence the industry and inspire future inventors.

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