This inventor holds 3 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2000-2010.
Location History:
- Kao-Hsiung, TW (2000)
- Sheh-Chung, TW (2002)
- Sheh-Chung Village, TW (2010)
Company Filing History:
Years Active: 2000-2010
Title: Innovations by Inventor Hung Der Su
Introduction
Hung Der Su is a notable inventor based in Sheh-Chung Village, Taiwan. He has made significant contributions to the field of microelectronics, holding a total of 3 patents. His work focuses on enhancing device performance through innovative methods and designs.
Latest Patents
One of his latest patents is titled "Spacer layer etch method providing enhanced microelectronic device performance." This method involves forming a field effect transistor device that utilizes a conformal spacer layer on a gate electrode. The gate electrode serves as a mask for creating a lightly doped extension region within the semiconductor substrate. Additionally, the gate electrode and conformal spacer layer are used as a mask for forming a source/drain region within the substrate. An anisotropically etched shaped spacer material layer is then formed on the conformal spacer layer and isotropically etched to improve exposure of the source/drain region before a silicide layer is applied.
Another significant patent is the "Gate ground circuit approach for I/O ESD protection." This invention provides an I/O ESD protection circuit that includes a driver circuit, an ESD protection circuit, a Vcc/Vss protection circuit, and a clamping circuit. The driver and ESD protection circuits each consist of an NMOS cascode circuit. The Vcc/Vss protection circuit comprises NMOS transistors and biasing resistive means. The clamping circuit features a diode that connects the I/O pad of the protection circuit to the gate of the NMOS transistor. During an ESD event, the diode activates the NMOS transistor of the Vcc/Vss protection circuit, effectively clamping the first transistor of both NMOS cascode circuits. This clamping action prevents the gate of these transistors from being affected by ESD voltage, creating a parasitic bipolar transistor in each cascode circuit, which ensures a uniform current flow in the buried area of the P-well of both NMOS cascode circuits.
Career Highlights
Hung Der Su is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he continues to innovate in the field of semiconductor technology. His work has been instrumental in advancing microelectronic device performance.
Collaborations
He has collaborated with notable coworkers such as Jyh-Huei Chen and Yi-Hsun Wu, contributing to various projects and innovations within the company.
Conclusion