Tokyo, Japan

Hiroto Nakamura

This inventor holds 25 USPTO granted patents, primarily in Electronic Device Testing. Top assignees: Adv Antest Corporation, Olympus Corporation, The University of Tokyo. Active years: 1993-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroto Nakamura. Retrieved from https://idiyas.com/inventor/hiroto-nakamura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 84.0

Average Co-Inventor Count = 2.2

ph-index = 11

Forward Citations = 330(Granted Patents)


Location History:

  • Kazo, JP (1993 - 2002)
  • Tokyo, JP (2001 - 2012)
  • Saitama, JP (1993 - 2015)
  • Hino, JP (2020)

Company Filing History:


Years Active: 1993-2026

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Areas of Expertise:
Thermoelectric Device
Drive Device
Ultrasonic Treatment
Electronic Component
Testing Apparatus
Calibration Method
IC Testing
Semiconductor Device
Device Transfer
Storage Device
Test Tray
Conveying Integrated Circuits
25 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Hiroto Nakamura in Electronic Device Testing

Introduction

Hiroto Nakamura, a prominent inventor based in Tokyo, Japan, has made significant contributions to the field of electronic device testing. With 21 patents to his name, Nakamura's work stands out for its focus on improving the efficiency and precision of electronic component handling and testing methods. His innovative solutions have a considerable impact on the electronics industry.

Latest Patents

Nakamura's most recent patents include an Electronic Component Handling Apparatus and an Electronic Component Testing Apparatus, along with a novel Electronic Component Testing Method. The Electronic Component Handling Apparatus is engineered to manage an electronic device under test featuring distinct main surfaces with associated device terminals. The apparatus incorporates a contact arm designed with a holding-side socket and a suction pad for secure handling. An alignment mechanism ensures precise positioning of the device for optimal interaction with a second socket, facilitating effective testing.

In addition, he developed a Calibration Method of Electronic Device Test Apparatus, which employs advanced image processing technology to accurately position integrated circuits (IC) relative to their sockets. This method calculates necessary offset amounts to enhance accuracy, ultimately streamlining the testing process.

Career Highlights

Nakamura is a vital part of Adv Antest Corporation, where his expertise drives innovation in electronic testing solutions. Over the years, he has transformed theoretical concepts into practical inventions that have reinforced the company’s reputation in the electronics sector. His dedication to research and development has not only benefited his organization but has also advanced the technology landscape as a whole.

Collaborations

Throughout his career, Nakamura has collaborated with talented professionals, including Yoshihito Kobayashi and Akihiko Ito. Together, they have worked on multiple projects aimed at enhancing the efficiency and effectiveness of electronic device testing. Such collaborations amplify the strength of their innovative endeavors, deriving substantial advancements in the technology they develop.

Conclusion

Hiroto Nakamura's work in electronic device testing exemplifies the vital role inventors play in driving technological progress. With a solid portfolio of patents, he continues to pioneer advancements that are reshaping the industry. His commitment to innovation not only places him at the forefront of his field but also inspires future generations of inventors to challenge existing limitations and explore new horizons in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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