logo

For the Inventor, By the Inventor

Tokyo, Japan

Hiroshi Asazawa

This inventor holds 16 USPTO granted patents. Top assignee: Nec Corporation. Active years: 1986-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroshi Asazawa. Retrieved from https://idiyas.com/inventor/hiroshi-asazawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16

% Patents Active = 100.0

Average Co-Inventor Count = 1.1

ph-index = 7

Forward Citations = 173(Granted Patents)


Company Filing History:

goldMedal16 out of 36,684 
 
Nec Corporation
 patents

Years Active: 1986-1999

Loading Chart...
16 patents (USPTO):Explore Patents
1. 5917377 - Differential amplifier circuit (1999-06-29),
2. 5844437 - Differential flipflop circuit operating with a low voltage (1998-12-01),
3. 5787339 - Radiocommunication system operating in a time shared control (1998-07-28),
4. 5596296 - Clock driver circuit (1997-01-21),
5. 5594633 - Voltage-to-current converting circuit operating with low supply voltage (1997-01-14),
6. 5352992 - Amplifier circuit (1994-10-04),
7. 5266846 - Differential circuit implemented by bipolar transistors free from excess (1993-11-30),
8. 5212411 - Flip-flop circuit having CMOS hysteresis inverter (1993-05-18),
9. 5177449 - Radio frequency amplifier circuit (1993-01-05),
10. 5150076 - Emitter-grounded amplifier circuit with bias circuit (1992-09-22),
11. 5119095 - D/A converter for minimizing nonlinear error (1992-06-02),
12. 4829591 - Portable radio (1989-05-09),
13. 4810909 - Amplifier circuit having high-speed raising time (1989-03-07),
14. 4797576 - Flip-flop circuit with short propagation delay (1989-01-10),
15. 4749877 - Bias circuit for an FET (1988-06-07),

Title: Hiroshi Asazawa: A Pioneer in Differential Amplifier Innovations

Introduction

Hiroshi Asazawa is a notable inventor based in Tokyo, Japan, recognized for his significant contributions to electronic circuit design. With a portfolio of 16 patents, Asazawa has made noteworthy advancements in the field of differential amplifier circuits and flip-flop technology.

Latest Patents

Among Asazawa's latest innovations are a groundbreaking differential amplifier circuit and a differential flip-flop circuit designed to operate with low voltage. The differential amplifier circuit he developed enables the oscillation of a pre-scaler, which prevents sensitivity deterioration due to signals being absent. This circuit includes a first pair of differential devices made of transistors receiving the AC signal, along with load resistances and a constant-current source. Additionally, a second pair of differential devices performs positive feedback, enhanced by a capacitor that manages the AC signal bypass.

Furthermore, the differential flip-flop circuit, characterized by its low voltage operation requirement of not greater than 1 V, comprises master and slave latch circuits constructed from differential pairs of transistors linked directly between VCC and VSS. A specially designed clock driving circuit, responsive to a pair of complementary clocks, effectively pulls down the level of complementary data signals supplied to each latch.

Career Highlights

Asazawa is currently associated with NEC Corporation, a leading name in the technological landscape. His work exemplifies the innovative spirit and commitment to advancing electronic circuit functionality, which has been instrumental in various applications.

Collaborations

Throughout his career, Asazawa has collaborated with skilled professionals such as Kazuya Hashimoto and Jun Yoshida. Their collective expertise contributes to the development of innovative solutions that push the boundaries of technology.

Conclusion

Hiroshi Asazawa stands out as an exceptional inventor whose work in differential amplifier circuits and low-voltage technology showcases his passion for innovation. His contributions not only enhance the capabilities of electronic devices but also pave the way for future advancements in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…