The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 1989
Filed:
Aug. 05, 1987
Applicant:
Inventor:
Hiroshi Asazawa, Tokyo, JP;
Assignee:
NEC Corporation, , JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072721 ; 307291 ; 307445 ; 377116 ;
Abstract
In a flip-flop circuit, input and output terminals of two inverters connected between corresponding data input terminals and corresponding data output terminals are cross-connected. Latch switches are inserted between the inverters and the corresponding data input terminals. Hold switches are inserted in the cross-connected portion of the two inverters. The latch switches are turned on/off in synchronism with a latch input while the hold switches are turned on/off in synchronism with a hold input.
Asazawa, Hiroshi. (1989). Flip-flop circuit with short propagation delay (U.S. Patent No. 4797576). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4797576
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile