The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 1994

Filed:

May. 07, 1993
Applicant:
Inventor:

Hiroshi Asazawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03G / ; H03G / ;
U.S. Cl.
CPC ...
330310 ; 330291 ; 330293 ; 330296 ; 330311 ;
Abstract

An amplifier circuit having an emitter-grounded amplifying stage formed of a transistor Q1 and a load resistor R.sub.L and having an output stage including an emitter follower formed of transistors Q2 and Q3. The base of the transistor Q1 of the amplifying stage and the base of the transistor Q3 of the output stage are connected with each other for receiving input signals and biased by a bias circuitry 5. The input signals thus given to the base of transistor Q3 for the emitter follower of the output stage cause the transistors Q2 and Q3 to alternately turn on and off to provide a higher output driving power to the load connected to the output terminal than prior art amplifier circuits having conventional emitter followers and resistor feedback amplification networks.


Find Patent Forward Citations

Asazawa, Hiroshi. (1994). Amplifier circuit (U.S. Patent No. 5352992). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5352992

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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