The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 1997
Filed:
Mar. 30, 1995
Hiroshi Asazawa, Tokyo, JP;
NEC Corporation, , JP;
Abstract
A clock driver circuit comprises a first driver including first and second inverters cascaded between an input terminal and a first output terminal for outputting a non-inverted signal delayed from the clock signal applied to the input terminal by a delay amount corresponding to two stages of inverters. The clock driver circuit also comprises and a second driver including third, fourth and fifth inverters cascaded between the input terminal and a second output terminal and a sixth inverter connected between the input terminal and the second output terminal. With this arrangement, a first signal delayed from the clock signal applied to the input terminal by a first delay amount corresponding to the third, fourth and fifth inverters, is synthesized by a wired-OR at the second output terminal with a second signal delayed from the clock signal applied to the input terminal by a second delay amount corresponding to the sixth inverter. Thus, a synthesized inverted signal delayed from the clock signal applied to the input terminal by a delay amount corresponding to two stages of inverters, is outputted from the second output terminal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile