Tokyo, Japan

Hideki Yasuoka

This inventor holds 21 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Renesas Technology Corp., Hitachi, Ltd., Renesas Electronics Corporation. Active years: 1985-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hideki Yasuoka. Retrieved from https://idiyas.com/inventor/hideki-yasuoka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 66.7

Average Co-Inventor Count = 2.8

ph-index = 6

Forward Citations = 121(Granted Patents)


Location History:

  • Takasaki, JP (1985 - 1993)
  • Musashino, JP (1986 - 2010)
  • Hitachinaka, JP (2008 - 2012)
  • Tokyo, JP (2008 - 2014)

Company Filing History:


Years Active: 1985-2014

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Areas of Expertise:
Schottky Barrier Diode
MISFET
Integrated Circuit
High Breakdown Voltage
Field Effect Transistor
Power MOSFET
Manufacturing Method
Isolation Regions
Embedded Insulating Film
Semiconductor Device
21 patents (USPTO):Explore Patents

Title: Hideki Yasuoka: Innovator in Semiconductor Technology

Introduction

Hideki Yasuoka is a prominent inventor based in Tokyo, Japan, known for his significant contributions to the field of semiconductor technology. With an impressive total of 21 patents to his name, Yasuoka continues to push the boundaries of innovation, particularly in the area of semiconductor devices.

Latest Patents

One of Yasuoka's notable inventions is a semiconductor device comprising a Schottky barrier diode. The aim of this invention is to enhance the reliability of a semiconductor device that integrates a Schottky barrier diode within the same chip, along with its manufacturing technology. The design includes an n-type n-well region over a p-type semiconductor substrate, an n-type cathode region with a higher impurity concentration than the n-well region, and a p-type guard ring region that surrounds the cathode. Furthermore, it features an anode conductor film that covers both the n-type cathode region and the p-type guard ring, ensuring electrical coupling. This innovative architecture also includes n-type cathode conduction regions located outside the p-type guard ring and a cathode conductor film that provides additional electrical connections. Notably, the Schottky coupling between the anode conductor film and the n-type cathode region stands out as a key feature of its design.

Career Highlights

Throughout his career, Hideki Yasuoka has worked at leading technology companies, including Renesas Technology Corporation and Hitachi, Ltd. His experiences at these institutions have significantly influenced his approach to semiconductor innovation, allowing him to hone his skills and contribute to various advancements in the industry.

Collaborations

Yasuoka has collaborated with several noteworthy colleagues like Masami Koketsu and Keiichi Yoshizumi. Their partnership in the development of semiconductor technologies reflects a synergy that has led to significant advancements in their field.

Conclusion

With his extensive portfolio of patents and remarkable collaborations, Hideki Yasuoka has firmly established himself as a leading figure in semiconductor innovation. His ongoing work promises to deliver further advancements in technology, showcasing the vital role of inventors like him in shaping the future of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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