Essex Junction, VT, United States of America

Gustavo Enrique Tellez

This inventor holds 53 USPTO granted patents and 2 published patent applications, primarily in Integrated Circuit Design. Top assignees: International Business Machines Corporation, Globalfoundries Inc.. Active years: 2001-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gustavo Enrique Tellez. Retrieved from https://idiyas.com/inventor/gustavo-enrique-tellez

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 53 (Patent Applications = 2)

% Patents Active = 50.9

Average Co-Inventor Count = 4.0

ph-index = 10

Forward Citations = 406(Granted Patents)

Forward Citations (Not Self Cited) = 374(Dec 10, 2025)

Location History:

Cornwall on Hudson, NY (US) (2001)
Essex Junciton, VT (US) (2008)
Essex Junction, VT (US) (2004 - 2021)
Hyde Park, NY (US) (2019 - 2024)

Company Filing History:

52 out of 166,425

International Business Machines Corporation

Years Active: 2001-2025

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Areas of Expertise:

Integrated Circuit

Routing Optimization

Layout Synthesis

Yield Enhancement

Timing Analysis

Hotspot Identification

Self-Aligned Double Patterning

Coloring Techniques

Buffering Solutions

EUV Routing

Congestion Analysis

Chip Manufacturing

53 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12493730 - Timing-aware and simultaneous optimization of latch clustering and placement in an integrated circuit (2025-12-09),

2. 12423502 - Rule check heatmap prediction (2025-09-23),

3. 12417333 - Short net pin alignment for routing (2025-09-16),

4. 12277375 - Power staple avoidance for routing via reduction (2025-04-14),

5. 11983476 - Technology-independent line end routing (2024-05-14),

6. 11966682 - Fast independent checker for extreme ultraviolet (EUV) routing (2024-04-23),

7. 11829697 - Region-based layout routing (2023-11-28),

8. 11734486 - Sweepline triangulation for spanning graphs (2023-08-22),

9. 11341311 - Generation and selection of universally routable via mesh specifications in an integrated circuit (2022-05-24),

10. 11120192 - White space insertion for enhanced routability (2021-09-14),

11. 11087062 - Dynamic SADP region generation (2021-08-10),

12. 11074379 - Multi-cycle latch tree synthesis (2021-07-27),

13. 10831972 - Capacity model for global routing (2020-11-10),

14. 10796064 - Autonomous placement to satisfy self-aligned double patterning constraints (2020-10-06),

15. 10747935 - Identification of hotspots in congestion analysis during physical design of integrated circuit (2020-08-18),

Title: Gustavo Enrique Tellez: Pioneering Inventor from Essex Junction

Introduction: Gustavo Enrique Tellez is a renowned inventor hailing from Essex Junction, VT (US), known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Gustavo Enrique Tellez holds several patents in the areas of renewable energy, sustainable materials, and advanced robotics, showcasing his commitment to creating a more sustainable future through technological advancements.

Career Highlights: With a career spanning over two decades, Gustavo Enrique Tellez has worked with leading tech companies, research institutions, and universities to develop cutting-edge solutions that have revolutionized various industries.

Collaborations: Throughout his career, Gustavo Enrique Tellez has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and creativity that has led to numerous successful projects and inventions.

Conclusion: Gustavo Enrique Tellez's passion for innovation, coupled with his relentless drive to push the boundaries of technology, has solidified his reputation as a visionary inventor whose work continues to inspire future generations of innovators.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: