The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Jun. 02, 2022
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jinwook Jung, Somers, NY (US);

Gi-Joon Nam, Chappaqua, NY (US);

Jennifer Kazda, Englewood, NJ (US);

Gustavo Enrique Tellez, Hyde Park, NY (US);

Chau-Chin Huang, Tainan, TW;

Yao-Wen Chang, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3315 (2020.01); G06F 30/327 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3315 (2020.01); G06F 30/327 (2020.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01); G06F 2119/18 (2020.01);
Abstract

Embodiments are provided for providing enhanced fabrication and design of an integrated circuit in a computing system by a processor. One or more latches may be clustered by augmenting an integer linear program ('ILP') operation with a facility-location allocation (FLA) operation, wherein the clustering of the one or more latches is timing-aware. The one or more latches may be placed and assigned in the integrated chip based on clustering one or more latches.


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