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Santa Clara, CA, United States of America

Gregory Scott Mathews

This inventor holds 31 USPTO granted patents, primarily in Cache Memory Design. Top assignee: Intel Corporation. Active years: 1992-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gregory Scott Mathews. Retrieved from https://idiyas.com/inventor/gregory-scott-mathews

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 31

% Patents Active = 96.8

Average Co-Inventor Count = 2.4

ph-index = 17

Forward Citations = 964(Granted Patents)

Location History:

Boca Raton, FL (US) (1995 - 1997)
Cupertino, CA (US) (1992 - 2004)
Santa Clara, CA (US) (1995 - 2004)

Company Filing History:

31 out of 56,322

Intel Corporation

Years Active: 1992-2004

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Areas of Expertise:

Cache Memory

Translation Lookaside Buffer

Data Requests

Power Consumption

Load Ordering

Memory Management

Pipelined Design

Error Detection

Temporal Data

Multi-Processing Protocol

Clock Signal

Latency Reduction

31 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6725339 - Processing ordered data requests to a memory (2004-04-20),

2. 6687790 - Single bank associative cache (2004-02-03),

3. 6681317 - Method and apparatus to provide advanced load ordering (2004-01-20),

4. 6678815 - Apparatus and method for reducing power consumption due to cache and TLB accesses in a processor front-end (2004-01-13),

5. 6658559 - Method and apparatus for advancing load operations (2003-12-02),

6. 6625715 - System and method for translation buffer accommodating multiple page sizes (2003-09-23),

7. 6567952 - Method and apparatus for set associative cache tag error detection (2003-05-20),

8. 6560689 - TLB using region ID prevalidation (2003-05-06),

9. 6542966 - Method and apparatus for managing temporal and non-temporal data in a single cache structure (2003-04-01),

10. 6427191 - High performance fully dual-ported, pipelined cache design (2002-07-30),

11. 6418521 - Hierarchical fully-associative-translation lookaside buffer structure (2002-07-09),

12. 6405233 - Unaligned semaphore adder (2002-06-11),

13. 6381678 - Processing ordered data requests to a memory (2002-04-30),

14. 6282636 - Decentralized exception processing system (2001-08-28),

15. 6275901 - Computer system having a set associative cache memory with sequentially accessed on-chip address tag array and off-chip data array (2001-08-14),

Title: Gregory Scott Mathews - Innovative Inventor from Santa Clara

Introduction: Gregory Scott Mathews is a renowned inventor based in Santa Clara, CA, known for his groundbreaking contributions to various technological fields.

Latest Patents: Gregory Scott Mathews holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his diverse range of expertise.

Career Highlights: With over two decades of experience in the industry, Gregory has worked with top research institutions and leading tech companies, consistently pushing the boundaries of innovation.

Collaborations: Throughout his career, Gregory has collaborated with fellow inventors, patent attorneys, and industry experts to bring his ideas to life, fostering a culture of creativity and excellence.

Conclusion: Gregory Scott Mathews continues to inspire the next generation of inventors with his passion for innovation and his relentless pursuit of technological advancement.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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