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For the Inventor, By the Inventor

Dresden, Germany

Gert Burbach

This inventor holds 13 USPTO granted patents and 1 EPO patent. Top assignees: Advanced Micro Devices Corporation, Globalfoundries Inc.. Active years: 2001-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gert Burbach. Retrieved from https://idiyas.com/inventor/gert-burbach

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13

% Patents Active = 84.6


Average Co-Inventor Count = 2.9

ph-index = 7

Forward Citations = 101(Granted Patents)


Company Filing History:

goldMedal12 out of 13,161 
 
Advanced Micro Devices Corporation
 patents
silverMedal1 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2001-2014

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13 patents (USPTO):Explore Patents
1. 8796807 - Temperature monitoring in a semiconductor device by using a PN junction based on silicon/germanium materials (2014-08-05),
2. 7732291 - Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions (2010-06-08),
3. 7354839 - Gate structure and a transistor having asymmetric spacer elements and methods of forming the same (2008-04-08),
4. 7354836 - Technique for forming a strained transistor by a late amorphization and disposable spacers (2008-04-08),
5. 7238578 - Method of forming a semiconductor structure comprising transistor elements with differently stressed channel regions (2007-07-03),
6. 7005380 - Simultaneous formation of device and backside contacts on wafers having a buried insulator layer (2006-02-28),
7. 6943088 - Method of manufacturing a trench isolation structure for a semiconductor device with a different degree of corner rounding (2005-09-13),
8. 6905924 - Diode structure for SOI circuits (2005-06-14),
9. 6821840 - Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area (2004-11-23),
10. 6720242 - Method of forming a substrate contact in a field effect transistor formed over a buried insulator layer (2004-04-13),
11. 6656825 - Semiconductor device having an improved local interconnect structure and a method for forming such a device (2003-12-02),
12. 6541863 - Semiconductor device having a reduced signal processing time and a method of fabricating the same (2003-04-01),
13. 6271122 - Method of compensating for material loss in a metal silicone layer in contacts of integrated circuit devices (2001-08-07),

Title: The Innovative Journey of Gert Burbach

Introduction: Gert Burbach, a male inventor hailing from Dresden, DE, has made significant contributions to the field of technology and innovation.

Latest Patents: Gert Burbach holds several patents in the areas of renewable energy technologies, smart devices, and sustainable materials.

Career Highlights: With a career spanning over two decades, Gert Burbach has worked for leading tech companies, where he spearheaded groundbreaking projects that have shaped the industry.

Collaborations: Throughout his career, Gert Burbach has collaborated with top researchers, engineers, and designers to bring his innovative ideas to life, resulting in successful products and solutions.

Conclusion: Gert Burbach's dedication to innovation and his passion for creating impactful technologies have solidified his reputation as a pioneering inventor in the tech industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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