IDiyas

For the Inventor, By the Inventor

Barcelona, Spain

Enric Gibert Codina

USPTO Granted Patents = 11 

 

Average Co-Inventor Count = 6.8

ph-index = 3

Forward Citations = 26(Granted Patents)


Location History:

  • Sant Cugat del Valles, ES (2014 - 2016)
  • Barcelona, ES (2014 - 2018)
  • Sant Cugat del Vallès, ES (2016 - 2018)
  • Sant Cugat, ES (2020)

Company Filing History:

goldMedal11 out of 54,664 
 
Intel Corporation
 patents

Years Active: 2014-2020

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11 patents (USPTO):Explore Patents
1. 10621092 - Merging level cache and data cache units having indicator bits related to speculative execution (2020-04-14),
2. 10157063 - Instruction and logic for optimization level aware branch prediction (2018-12-18),
3. 10013326 - Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region (2018-07-03),
4. 9983880 - Method and apparatus for improved thread selection (2018-05-29),
5. 9940138 - Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations (2018-04-10),
6. 9811341 - Managed instruction cache prefetching (2017-11-07),
7. 9389871 - Combined floating point multiplier adder with intermediate rounding logic (2016-07-12),
8. 9329848 - Mechanism for facilitating dynamic and efficient fusion of computing instructions in software programs (2016-05-03),
9. 9116719 - Partial commits in dynamic binary translation based systems (2015-08-25),
10. 8909902 - Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution (2014-12-09),
11. 8898646 - Method and apparatus for flexible, accurate, and/or efficient code profiling (2014-11-25),
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