The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2017
Filed:
Dec. 29, 2011
Kyriakos A. Stavrou, Barcelona, ES;
Enric Gibert Codina, Barcelona, ES;
Josep M. Codina, Hospitalet de Llobregat, ES;
Crispin Gomez Requena, Valencia, ES;
Antonio Gonzalez, Barcelona, ES;
Mirem Hyuseinova, Barcelona, ES;
Christos E. Kotselidis, Linz, AT;
Fernando Latorre, Barcelona, ES;
Pedro Lopez, Molins de Rei, ES;
Marc Lupon, Barcelona, ES;
Carlos Madriles Gimeno, Barcelona, ES;
Grigorios Magklis, Barcelona, ES;
Pedro Marcuello, Barcelona, ES;
Alejandro Martinez Vicente, Barcelona, ES;
Raul Martinez, Barcelona, ES;
Daniel Ortega, Barcelona, ES;
Demos Pavlou, Barcelona, ES;
Georgios Tournavitis, Barcelona, ES;
Polychronis Xekalakis, Barcelona, ES;
Kyriakos A. Stavrou, Barcelona, ES;
Enric Gibert Codina, Barcelona, ES;
Josep M. Codina, Hospitalet de Llobregat, ES;
Crispin Gomez Requena, Valencia, ES;
Antonio Gonzalez, Barcelona, ES;
Mirem Hyuseinova, Barcelona, ES;
Christos E. Kotselidis, Linz, AT;
Fernando Latorre, Barcelona, ES;
Pedro Lopez, Molins de Rei, ES;
Marc Lupon, Barcelona, ES;
Carlos Madriles Gimeno, Barcelona, ES;
Grigorios Magklis, Barcelona, ES;
Pedro Marcuello, Barcelona, ES;
Alejandro Martinez Vicente, Barcelona, ES;
Raul Martinez, Barcelona, ES;
Daniel Ortega, Barcelona, ES;
Demos Pavlou, Barcelona, ES;
Georgios Tournavitis, Barcelona, ES;
Polychronis Xekalakis, Barcelona, ES;
Intel Corporation, Santa Clara, CA (US);
Abstract
Disclosed is an apparatus and method to manage instruction cache prefetching from an instruction cache. A processor may comprise: a prefetch engine; a branch prediction engine to predict the outcome of a branch; and dynamic optimizer. The dynamic optimizer may be used to control: identifying common instruction cache misses and inserting a prefetch instruction from the prefetch engine to the instruction cache.