Debashis Sahoo is a prominent inventor based in Stanford, CA (US). He has made significant contributions to the field of circuit analysis, holding a total of 8 patents. His work focuses on innovative methods for evaluating erroneous states in target circuits, showcasing his expertise in the area.

Latest Patents

One of his latest patents is titled "System and method for evaluating an erroneous state associated with a target circuit." This invention provides a method for evaluating an erroneous state by receiving information related to a target circuit and executing partitioned ordered binary decision diagram (POBDD) operations. This process helps identify an erroneous state within a sub-space of the circuit and traces a path reflecting the correlation between the initial state and the encountered erroneous state.

Another notable patent is "Multithreaded reachability." This method involves partitioning a state space of a circuit into multiple partitions, with each assigned to a thread for parallel reachability analysis. The method incorporates early and partial communication algorithms to facilitate the analysis across partitions, enhancing the efficiency of the process.

Career Highlights

Debashis Sahoo has established himself as a key figure in his field through his innovative patents and contributions to circuit analysis. His work at Fujitsu Corporation has allowed him to apply his expertise in practical applications, furthering advancements in technology.

Collaborations

He has collaborated with notable colleagues such as Jawahar Jain and Amit Narayan, contributing to a dynamic work environment that fosters innovation and creativity.

Conclusion

Debashis Sahoo's contributions to circuit analysis through his patents and collaborative efforts highlight his role as an influential inventor in the technology sector. His work continues to impact the field significantly.

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