Hsinchu, Taiwan

Chung-Kuang Lee

This inventor holds 8 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 1997-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung-Kuang Lee. Retrieved from https://idiyas.com/inventor/chung-kuang-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.8

ph-index = 7

Forward Citations = 141(Granted Patents)


Company Filing History:


Years Active: 1997-2002

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8 patents (USPTO):Explore Patents

Title: Innovations of Chung-Kuang Lee

Introduction

Chung-Kuang Lee is a prominent inventor based in Hsin-Chu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 8 patents. His work focuses on enhancing the efficiency and functionality of integrated circuits.

Latest Patents

One of his latest patents is titled "Multi-layer wiring structure having conductive sidewall etch stoppers and a stacked plug interconnect." This invention provides a structure and method for electrically connecting wiring layers by forming a stacked plug interconnect. The first wiring layer is formed over a dielectric layer, followed by a top barrier layer. First sidewall spacers, preferably composed of titanium nitride and tungsten, are formed on the first wire layer sidewalls. An inter metal dielectric layer is then created over the surface, and a via is etched to expose the first wiring layer. The titanium nitride/tungsten spacers act as an etch stop for the via etch and increase the contact area of the wiring layers. A tungsten plug with an outer TiN barrier layer is formed, filling the via and contacting the first wiring layer. On top of the tungsten plug, a second wiring layer is formed, also featuring titanium nitride and tungsten sidewall spacers.

Another notable patent is for an "Insulator structure for polysilicon resistors." This invention describes a polysilicon resistor structure for use within integrated circuits and the method for its formation. A first insulating layer made from a glasseous material is formed directly on the surface of a semiconductor substrate. A polysilicon resistor is then created in contact with this first insulating layer. A second insulating layer, formed from silicon oxide material, is deposited over the first insulating layer and the polysilicon resistor using a Plasma Enhanced Chemical Vapor Deposition process.

Career Highlights

Chung-Kuang Lee is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he continues to innovate and contribute to advancements in semiconductor technology. His expertise and inventions have played a crucial role in the development of more efficient electronic devices.

Collaborations

He has collaborated with notable coworkers such as Pin-Nan Tseng and Jung-hsien Hsu, further enhancing the impact of his work in the industry.

Conclusion

Chung-Kuang Lee's contributions to semiconductor technology through his innovative patents demonstrate his

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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