Chun-Hsien Lin

This inventor holds 14 USPTO granted patents and 9 published patent applications, primarily in Semiconductor Packaging. Top assignee: Siliconware Precision Industries Co., Ltd.. Active years: 2016-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chun-Hsien Lin. Retrieved from https://idiyas.com/inventor/chun-hsien-lin-alxgbots

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 14 (Patent Applications = 9)

% Patents Active = 100.0

Average Co-Inventor Count = 6.2

ph-index = 1

Forward Citations = 3(Granted Patents)

Company Filing History:

14 out of 826

Siliconware Precision Industries Co., Ltd.

patents

Years Active: 2016-2021

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Areas of Expertise:

Electronic Package

Semiconductor Package

Fabrication Method

Coreless Packaging

Wiring Package Substrate

Embedded Components

Packaging Substrate

Single-Layer Wiring

Package Structure

Manufacturing Process

14 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11205644 - Method for fabricating electronic package (2021-12-21),

2. 10629572 - Electronic package and method for fabricating the same (2020-04-21),

3. 10141266 - Method of fabricating semiconductor package structure (2018-11-27),

4. 10096491 - Method of fabricating a packaging substrate including a carrier having two carrying portions (2018-10-09),

5. 10068842 - Single-layer wiring package substrate, single-layer wiring package structure having the package substrate, and method of fabricating the same (2018-09-04),

6. 10043757 - Semiconductor package structure and method of fabricating the same (2018-08-07),

7. 10002825 - Method of fabricating package structure with an embedded electronic component (2018-06-19),

8. 9905438 - Method of manufacturing package substrate and semiconductor package (2018-02-27),

9. 9899249 - Fabrication method of coreless packaging substrate (2018-02-20),

10. 9735080 - Single-layer wiring package substrate, single-layer wiring package structure having the package substrate, and method of fabricating the same (2017-08-15),

11. 9716060 - Package structure with an embedded electronic component and method of fabricating the package structure (2017-07-25),

12. 9640503 - Package substrate, semiconductor package and method of manufacturing the same (2017-05-02),

13. 9510463 - Coreless packaging substrate and fabrication method thereof (2016-11-29),

14. 9490225 - Package structure and fabrication method thereof (2016-11-08),

Title: Innovations of Chun-Hsien Lin in Electronic Packaging

Introduction

Chun-Hsien Lin is a prominent inventor based in Taichung, Taiwan. He has made significant contributions to the field of electronic packaging, holding a total of 14 patents. His work focuses on improving the reliability and performance of electronic components through innovative packaging methods.

Latest Patents

One of Chun-Hsien Lin's latest patents is a method for fabricating an electronic package. This electronic package includes a first substrate with a first insulating portion and a first electronic component disposed on it. A second substrate, which has a second insulating portion, is stacked on the first substrate through a plurality of conductive elements. A first encapsulant is formed between the two substrates. The unique aspect of this invention is that the first insulating portion differs in rigidity from the second insulating portion. This design allows one substrate to pull at the other during high-temperature processes, bending them in the same direction and thereby reducing warpage deviation of the overall electronic package. The invention also provides a method for fabricating this electronic package.

Career Highlights

Chun-Hsien Lin is associated with Siliconware Precision Industries Co., Ltd., a leading company in the semiconductor packaging industry. His innovative approaches have significantly advanced the technology used in electronic packaging, making him a key figure in this field.

Collaborations

Chun-Hsien Lin has collaborated with notable coworkers, including Yu-Cheng Pai and Ming-Chen Sun. Their combined expertise has contributed to the successful development of various electronic packaging solutions.

Conclusion

Chun-Hsien Lin's contributions to electronic packaging through his innovative patents have made a lasting impact on the industry. His work continues to influence the design and fabrication of reliable electronic components.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

9 patents pending: