Hsinchu, Taiwan

Chou-Feng Lee

This inventor holds 5 USPTO granted patents and 2 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2004-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chou-Feng Lee. Retrieved from https://idiyas.com/inventor/chou-feng-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 

% Patents Active = 40.0

Average Co-Inventor Count = 1.7

ph-index = 2

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2004-2026

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5 patents (USPTO):Explore Patents

Title: Innovations of Chou-Feng Lee

Introduction

Chou-Feng Lee is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, particularly through his innovative patents. With a total of 5 patents, Lee continues to push the boundaries of technology in his industry.

Latest Patents

One of his latest patents is titled "Methods and systems for cooling plasma treatment components." This invention discloses methods and systems for uniformly cooling a dome within a plasma treatment system. The design utilizes a diffuser that includes a perforated plate and a cone. The perforated plate features a center portion and multiple arrays of holes, each located circumferentially at different distances from the center. The cone extends away from the center, allowing the diffuser to spread cooling gas more uniformly across the surface of the dome.

Another significant patent is the "Method of removing a via fence." This method involves fabricating a dual damascene structure by etching a via through a first dielectric layer above a substrate. A barrier layer is placed on the first dielectric layer, followed by a second dielectric layer on the barrier layer. The via is partially filled with a photoresist plug, which is then etched back. A trench is etched through the second dielectric layer, aligned with the via. The substrate, having the first and second dielectric layers, is treated with acid to remove a via fence formed in the trench. Finally, the via and trench are filled with metal.

Career Highlights

Chou-Feng Lee is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he applies his expertise in semiconductor technology. His work has been instrumental in advancing the efficiency and effectiveness of plasma treatment systems.

Collaborations

Lee collaborates with talented individuals in his field, including Cheng Kuang Tso and Chih-Hsien Hsu, who contribute to the innovative environment at their workplace.

Conclusion

Chou-Feng Lee's contributions to semiconductor technology through his patents demonstrate his commitment to innovation. His work continues to influence the industry and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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