This inventor holds 7 USPTO granted patents and 3 published patent applications and 1 EPO patent. Top assignee: Ememory Technology Inc.. Active years: 2020-2025.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Taipei, TW (2020)
- Zhubei, TW (2022)
- Hsinchu County, TW (2021 - 2023)
Company Filing History:
Years Active: 2020-2025
Title: Chih-Wei Lai: Innovator in Electrostatic Discharge Technology
Introduction
Chih-Wei Lai is a prominent inventor based in Hsinchu County, Taiwan. He has made significant contributions to the field of electrostatic discharge (ESD) technology. With a total of 7 patents to his name, Lai has demonstrated his expertise and innovation in developing advanced electronic circuits.
Latest Patents
One of Lai's latest patents is an electrostatic discharge circuit. This ESD circuit includes a first P-type transistor, a second P-type transistor, a third P-type transistor, a first ESD current path, a second ESD current path, a biasing circuit, and a control circuit. The control circuit is connected between the pad and a first node. The first P-type transistor is connected with the pad, the control circuit, and a second node. The first ESD current path is connected between the second node and the first node, while the second ESD current path is also connected between the second node and the first node. The second P-type transistor is connected with the pad, the control circuit, and a third node. The biasing circuit is connected between the third node and the first node. The third P-type transistor is connected with the pad, the third node, and a fourth node. The internal circuit is connected between the fourth node and the first node.
Another notable patent is an integrated circuit with the capability of inhibiting ESD zap. This integrated circuit features an ESD inhibition circuit connected with a first pad, a first node, and a second node. The ESD inhibition circuit includes a capacitor bank, a resistor, a voltage selector, and a switching transistor. The capacitor bank is connected between the first pad and a third node, while the resistor is connected between the third node and the first node. The two input terminals of the voltage selector are connected with the third node and a fourth node, respectively. An output terminal of the voltage selector is connected with a fifth node. A first terminal of the switching transistor is connected with the first pad, and a second terminal is connected with the second node. The gate terminal of the switching transistor is connected with the fifth node.
Career Highlights
Chih-Wei Lai is currently employed at Ememory Technology Inc., where he continues to innovate in the field of ESD technology. His work has been
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile