The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 29, 2025
Filed:
May. 09, 2023
Ememory Technology Inc., Hsinchu, TW;
Yun-Jen Ting, Hsinchu, TW;
Chih-Wei Lai, Hsinchu County, TW;
Yi-Han Wu, Hsinchu County, TW;
Kun-Hsin Lin, Hsinchu County, TW;
Hsin-Kun Hsu, Hsinchu County, TW;
EMEMORY TECHNOLOGY INC., Hsinchu, TW;
Abstract
An ESD circuit includes a first P-type transistor, a second P-type transistor, a third P-type transistor, a first ESD current path, a second ESD current path, a biasing circuit and a control circuit. The control circuit is connected between the pad and a first node. The first P-type transistor is connected with the pad, the control circuit and a second node. The first ESD current path is connected between the second node and the first node. The second ESD current path is connected between the second node and the first node. The second P-type transistor is connected with the pad, the control circuit and a third node. The biasing circuit is connected between the third node and the first node. The third P-type transistor is connected with the pad, the third node, and a fourth node. The internal circuit is connected between the fourth node and the first node.