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Hsinchu, Taiwan

Chih-Min Chiang

This inventor holds 4 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2005-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chih-Min Chiang. Retrieved from https://idiyas.com/inventor/chih-min-chiang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 50.0

Average Co-Inventor Count = 5.2

ph-index = 2

Forward Citations = 8(Granted Patents)

Company Filing History:

4 out of 42,926

Taiwan Semiconductor Manufacturing Comp. Ltd.

Years Active: 2005-2008

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7372102 - Structure having a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology (2008-05-13),

2. 7250344 - Method of forming a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology (2007-07-31),

3. 7015086 - Method of forming a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology (2006-03-21),

4. 6847061 - Elimination of implant damage during manufacture of HBT (2005-01-25),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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