Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Min Chiang

Ruey-Hsin Liu

Kuan-Lun Chang

Jun-Lin Tsai

Tsyr-Shyang Liou

Denny Tang

Chun-Lin Tsai

Tsyr Shyang

A structure having a shallow trench-deep trench isolation region for a semiconductor device is provided.

Structure having a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology

A method of forming a shallow trench-deep trench isolation for a semiconductor device is provided.

Method of forming a shallow trench-deep trench isolation region for a BiCMOS/CMOS technology

A process for forming an isolation region comprised of shallow trench-deep trench configuration, wherein a smooth top surface topography is obtained for the isolation region and for adjacent active device regions in the semiconductor substrate, has been developed. The process features initially forming an insulator filled shallow trench shape, planarized via a first chemical mechanical polishing procedure, allowing reduced complexity to be realized during the subsequent formation of a narrow diameter, deep trench opening, in the insulator filled shallow trench shape and in an underlying portion of semiconductor substrate. Formation of a recessed polysilicon plug located in the bottom portion of the deep trench opening is followed by formation of an insulator plug located in a top portion of the deep trench opening, overlying the recessed polysilicon plug. This is accomplished via photolithographic and selective dry definition procedures, and a second chemical mechanical polishing procedure, resulting in a filled, deep trench opening exhibiting a smooth top surface topography.

During the conventional manufacture of HBTs, implant damage occurs which leads to enhanced internal base diffusion. This problem has been overcome by making the base and base contact area from a single, uniformly doped layer of silicon-germanium. Instead of an ion implant step to selectively reduce the resistance of this layer away from the base, a layer of polysilicon is selectively deposited (using selective epi deposition) onto only that part. Additionally, the performance of the polysilicon emitter is enhanced by means a brief thermal anneal that drives a small amount of opposite doping type silicon into the SiGe base layer.

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Hsin-Chu, Taiwan

Chih-Min Chiang