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For the Inventor, By the Inventor

San Diego, CA, United States of America

Chiew-Guan Tan

This inventor holds 25 USPTO granted patents and 5 published patent applications and 6 EPO patents, primarily in I/O Driver Technology. Top assignees: Qualcomm Incorporated, Conexant Systems, Inc., Qualcomm Incorproated. Active years: 2013-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chiew-Guan Tan. Retrieved from https://idiyas.com/inventor/chiew-guan-tan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 25 

% Patents Active = 76.0

 

Average Co-Inventor Count = 3.1

ph-index = 5

Forward Citations = 93(Granted Patents)


Company Filing History:

goldMedal23 out of 45,002 
 
Qualcomm Incorporated
 patents
silverMedal1 out of 763 
 
Conexant Systems, Inc.
 patents
bronzeMedal1 out of 75 
 
Qualcomm Incorproated
 patents

Years Active: 2013-2026

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Areas of Expertise:
Back Power Protection
Dynamic Gate Overdrive
Electrostatic Discharge
Input/Output Drivers
Voltage Level Shifting
Power Supply Shifting
Low-Voltage Devices
Multi-Bias Core
High-Speed Applications
Synchronous Polling
Control Interface
Delay Calibration
25 patents (USPTO):Explore Patents
1. 12700727 - Full-functionality back power protection (BPP) input/output (I/O) circuit with overvoltage protection including electrostatic discharge (2026-08-04),
2. 11637356 - Dynamic gate-overdrive voltage boost receiver (2023-04-25),
3. 11251794 - Dynamic transistor gate overdrive for input/output (I/O) drivers and level shifters (2022-02-15),
4. 11171649 - Static and intermittent dynamic multi-bias core for dual pad voltage level shifter (2021-11-09),
5. 10911047 - Level shifter with auto voltage-bias reliability protection (2021-02-02),
6. 10892760 - Dynamic transistor gate overdrive for input/output (I/O) drivers and level shifters (2021-01-12),
7. 10700683 - Dynamic power supply shifting (2020-06-30),
8. 10627881 - Back power protection (BPP) in a system on a chip (SOC) with critical signaling scheme (2020-04-21),
9. 10614009 - Asynchronous interrupt with synchronous polling and inhibit options on an RFFE bus (2020-04-07),
10. 10128846 - Apparatus and method for data level shifting with boost assisted inputs for high speed and low voltage applications (2018-11-13),
11. 9973431 - Single line PMIC-host low-level control interface (2018-05-15),
12. 9800230 - Latch-based power-on checker (2017-10-24),
13. 9735763 - High voltage input receiver using low-voltage devices (2017-08-15),
14. 9614529 - Input/output (I/O) driver implementing dynamic gate biasing of buffer transistors (2017-04-04),
15. 9484911 - Output driver with back-powering prevention (2016-11-01),

Title: The Innovative Journey of Chiew-Guan Tan

Introduction: Chiew-Guan Tan, a talented inventor based in San Diego, CA, has made significant contributions to the field of technology with his creative and groundbreaking ideas.

Latest Patents: Chiew-Guan Tan holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his diverse range of expertise and innovative spirit.

Career Highlights: Throughout his career, Chiew-Guan Tan has worked with leading tech companies to develop cutting-edge solutions that have revolutionized various industries. His passion for innovation and problem-solving has led to the creation of products that have positively impacted society.

Collaborations: Chiew-Guan Tan has collaborated with top researchers, engineers, and scientists to bring his ideas to life. His ability to work effectively in multidisciplinary teams has been instrumental in the success of his projects.

Conclusion: Chiew-Guan Tan's relentless pursuit of innovation and his commitment to pushing the boundaries of technology make him a true visionary in the world of inventions. His work continues to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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