Chi-wook Kim

This inventor holds 22 USPTO granted patents, primarily in Semiconductor Memory Devices. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2000-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chi-wook Kim. Retrieved from https://idiyas.com/inventor/chi-wook-kim

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 22

% Patents Active = 68.2

Average Co-Inventor Count = 2.1

ph-index = 8

Forward Citations = 283(Granted Patents)

Location History:

Suwon, KR (2000 - 2003)
Kyungki-do, KR (2001 - 2006)
Gyeonggi-Do, KR (2006 - 2010)
Suwon-si, KR (2009 - 2010)

Company Filing History:

22 out of 132,108

Samsung Electronics Co., Ltd.

patents

Years Active: 2000-2010

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Areas of Expertise:

Defect Detection

Timing Regulation

Local Sense Amplifier

Synchronous Output Buffer

Decoupling Capacitor

Data Input Circuit

Voltage Generating Circuit

High-Speed Signal Transmission

Dynamic Random Access Memory

Integrated Circuit

Signal Buffer

Memory Module System

22 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7692985 - Semiconductor memory device capable of detecting bridge defects and bridge defect detecting method performed in the semiconductor memory device (2010-04-06),

2. 7688651 - Methods and devices for regulating the timing of control signals in integrated circuit memory devices (2010-03-30),

3. 7525858 - Semiconductor memory device having local sense amplifier (2009-04-28),

4. 7495472 - Circuits/methods for electrically isolating fuses in integrated circuits (2009-02-24),

5. 7355901 - Synchronous output buffer, synchronous memory device and method of testing access time (2008-04-08),

6. 7352646 - Semiconductor memory device and method of arranging a decoupling capacitor thereof (2008-04-01),

7. 7161823 - Semiconductor memory device and method of arranging signal and power lines thereof (2007-01-09),

8. 7110316 - Shared decoupling capacitance (2006-09-19),

9. 7084684 - Delay stage insensitive to operating voltage and delay circuit including the same (2006-08-01),

10. 7075849 - Semiconductor memory device and layout method thereof (2006-07-11),

11. 7068083 - Synchronous output buffer, synchronous memory device and method of testing access time (2006-06-27),

12. 7057446 - Reference voltage generating circuit and internal voltage generating circuit for controlling internal voltage level (2006-06-06),

13. 7038972 - Double data rate synchronous dynamic random access memory semiconductor device (2006-05-02),

14. 6898139 - Integrated circuit memory devices and operating methods that are configured to output data bits at a lower rate in a test mode of operation (2005-05-24),

15. 6795372 - Bit line sense amplifier driving control circuits and methods for synchronous drams that selectively supply and suspend supply of operating voltages (2004-09-21),

Title: Inventor Chi-wook Kim: Revolutionizing Technology in Gyeonggi-do, KR

Introduction: Chi-wook Kim is a visionary inventor based in Gyeonggi-do, South Korea, known for his groundbreaking contributions to the field of technology.

Latest Patents: Kim holds several patents in the areas of artificial intelligence, robotics, and renewable energy, showcasing his innovative approach to solving complex problems.

Career Highlights: With a career spanning over two decades, Chi-wook Kim has worked with leading tech companies to develop cutting-edge solutions that have had a significant impact on various industries.

Collaborations: Throughout his career, Kim has collaborated with top researchers, engineers, and scientists to push the boundaries of technological advancements and bring his ideas to life.

Conclusion: Chi-wook Kim's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology in Gyeonggi-do, South Korea.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]